数字电子仿真实验\SD01\2-1 与逻辑.ms9
................\....\2-2 或逻辑.ms9
................\....\2-3 非逻辑.ms9
................\....\2-4 与非逻辑.ms9
................\....\2-5 或非逻辑.ms9
................\....\2-6 与或非逻辑.ms9
................\....\2-7 异或逻辑.ms9
................\....\2-8 逻辑函数的转换（1）.ms9
................\....\2-9 逻辑函数的转换（2）.ms9
................\...2\2-10 二极管开关电路.ms9
................\....\2-11 双极性三极管开关电路.ms9
................\....\2-12 MOS三极管开关电路.ms9
................\....\2-13 二极管与门电路.ms9
................\....\2-14 二极管或门电路.ms9
................\....\2-15 三极管非门.ms9
................\....\2-16 TTL反相器的基本电路及性能测试.ms9
................\....\2-17 TTL与非门电路.ms9
................\....\2-18 TTL或非门电路.ms9
................\....\2-19 TTL与或非门电路.ms9
................\....\2-20 TTL异或门电路.ms9
................\....\2-21 集电极开路门电路.ms9
................\....\2-22 OC门线与连接.ms9
................\....\2-23 三态输出门电路.ms9
................\....\2-24 74H系列与非门（74H00）的电路结构及性能测试.ms9
................\....\2-25 74S系列与非门（74S00）的电路结构.ms9
................\....\2-26 CMOS反相器的电路结构.ms9
................\....\2-27 CMOS反相器的输入保护电路及特性测试.ms9
................\....\2-28 CMOS与非门.ms9
................\....\2-29 CMOS或非门.ms9
................\....\2-30 漏极开路输出的与非门（CC40107）.ms9
................\....\2-31 CMOS双向模拟开关4066.ms9
................\....\2-32CMOS三态门 （1）.ms9
................\....\2-33 CMOS三态门（2）.ms9
................\....\2-34 Bi-CMOS反相器.ms9
................\....\2-35 Bi-CMOS与非门电路.ms9
................\....\2-36 Bi-CMOS或非门电路.ms9
................\...3\2-37 三位二进制普通编码器.ms9
................\....\2-38 8线3线优先编码器74LS148.ms9
................\....\2-39 用两片74LS148组成的16线4线优先编码器.ms9
................\....\2-40 二-十进制优先编码器74LS147.ms9
................\....\2-41 用二极管与门阵列组成的3线8线译码器.ms9
................\....\2-42 3线8线译码器74LS138.ms9
................\....\2-43 两片74LS138接成4线16线译码器.ms9
................\....\2-44 二-十进制译码器74LS42.ms9
................\....\2-45 七段显示译码器74LS48.ms9
................\....\2-46 双4选1数据选择器74LS153.ms9
................\....\2-47 采用CMOS传输门结构的数据选择器4539.ms9
................\....\2-48 8选1数据选择器74LS152.ms9
................\....\2-49 半加器.ms9
................\....\2-50 双全加器74LS183.ms9
................\....\2-51 4位超前进位加法器74LS283.ms9
................\....\2-52 4位数值比较器4585.ms9
................\....\2-53 2线-4线译码器中的竞争-冒险现象.ms9
................\...4\2-54 用或非门组成的基本RS触发器.ms9
................\....\2-55用与非门组成的基本RS触发器.ms9
................\....\2-56 同步RS触发器.ms9
................\....\2-57 带异步置位复位端的同步RS触发器.ms9
................\....\2-58 D锁存器电路.ms9
................\....\2-59 集成D锁存器74LS75.ms9
................\....\2-60 主从JK触发器74LS76.ms9
................\....\2-61 与输入主从JK触发器7472.ms9
................\....\2-62 CMOS传输门组成的边沿JK触发器4027.ms9
................\....\2-63 维持阻塞结构的边沿JK触发器74LS109.ms9
................\...5\2-100 用扭环形计数器构成的顺序脉冲发生器.ms9
................\....\2-101 例5.4.1 同步13进制计数器.ms9
................\....\2-102 例5.4.2 数据检测器.ms9
................\....\2-103 例5.4.3 自动售饮料机.ms9
................\....\2-64 例5.2.1的时序逻辑电路.ms9
................\....\2-65 例5.2.3的时序逻辑电路.ms9
................\....\2-66 例5.2.4的时序逻辑电路.ms9
................\....\2-67 同步D触发器74LS75组成的4位寄存器.ms9
................\....\2-68 用维持阻塞D触发器74LS175组成的4位寄存器.ms9
................\....\2-69 用D触发器74LS74组成的移位寄存器.ms9
................\....\2-70 用JK触发器组成的移位寄存器.ms9
................\....\2-71 四位双向移位寄存器74LS194.ms9
................\....\2-72 用两片74LS194接成八位双向移位寄存器.ms9
................\....\2-73 例5.3.1电路及功能演示.ms9
................\....\2-74 用T触发器构成的同步二进制加法计数器.ms9