Welcome![Sign In][Sign Up]
Location:
Downloads SourceCode Embeded-SCM Develop VHDL-FPGA-Verilog
Title: SOPC_LED Download
 Description: Led the design of on-chip programmable function properly after I test
 Downloaders recently: [More information of uploader 25616191]
 To Search:
File list (Check if you may need any files):
SOPC_LED\PLLJ_PLLSPE_INFO.txt
........\SOPC_LED.asm.rpt
........\SOPC_LED.bdf
........\SOPC_LED.done
........\SOPC_LED.dpf
........\SOPC_LED.fit.smsg
........\SOPC_LED.fit.summary
........\SOPC_LED.flow.rpt
........\SOPC_LED.jdi
........\SOPC_LED.map.smsg
........\SOPC_LED.map.summary
........\SOPC_LED.pin
........\SOPC_LED.qpf
........\SOPC_LED.qsf
........\SOPC_LED.qws
........\SOPC_LED.sof
........\SOPC_LED.sta.summary
........\alt_mem_phy_defines.v
........\alt_mem_phy_sequencer.vhd
........\altpllpll.bsf
........\altpllpll.ppf
........\altpllpll.qip
........\altpllpll.v
........\altpllpll_bb.v
........\auk_ddr_hp_controller.vhd
........\auk_ddr_hp_init.ocp
........\clock_crossing_bridge.v
........\cpu.ocp
........\cpu.sdc
........\cpu.v
........\cpu_bht_ram.mif
........\cpu_dc_tag_ram.mif
........\cpu_ic_tag_ram.mif
........\cpu_jtag_debug_module_sysclk.v
........\cpu_jtag_debug_module_tck.v
........\cpu_jtag_debug_module_wrapper.v
........\cpu_mult_cell.v
........\cpu_ociram_default_contents.mif
........\cpu_rf_ram_a.mif
........\cpu_rf_ram_b.mif
........\cpu_test_bench.v
........\ddr_sdram.html
........\ddr_sdram.ppf
........\ddr_sdram.qip
........\ddr_sdram.v
........\ddr_sdram_advisor.ipa
........\ddr_sdram_auk_ddr_hp_controller_wrapper.v
........\ddr_sdram_controller_phy.v
........\ddr_sdram_ex_lfsr8.v
........\ddr_sdram_example_driver.v
........\ddr_sdram_example_top.sdc
........\ddr_sdram_example_top.v
........\ddr_sdram_example_top.v.tmp2
........\ddr_sdram_example_top_1.v
........\ddr_sdram_phy.html
........\ddr_sdram_phy.qip
........\ddr_sdram_phy.v
........\ddr_sdram_phy_alt_mem_phy_ciii.v
........\ddr_sdram_phy_alt_mem_phy_pll_ciii.bsf
........\ddr_sdram_phy_alt_mem_phy_pll_ciii.ppf
........\ddr_sdram_phy_alt_mem_phy_pll_ciii.qip
........\ddr_sdram_phy_alt_mem_phy_pll_ciii.v
........\ddr_sdram_phy_alt_mem_phy_pll_ciii.v_.bak
........\ddr_sdram_phy_alt_mem_phy_pll_ciii_bb.v
........\ddr_sdram_phy_alt_mem_phy_sequencer_wrapper.v
........\ddr_sdram_phy_autodetectedpins.tcl
........\ddr_sdram_phy_ddr_pins.tcl
........\ddr_sdram_phy_ddr_timing.sdc
........\ddr_sdram_phy_report_timing.tcl
........\ddr_sdram_phy_simgen_init.txt
........\ddr_sdram_phy_summary.csv
........\ddr_sdram_pin_assignments.tcl
........\jtag_uart.v
........\nios.bsf
........\nios.ptf
........\nios.ptf.bak
........\nios.ptf.pre_generation_ptf
........\nios.qip
........\nios.sopc
........\nios.sopcinfo
........\nios.v
........\nios_clock_0.v
........\nios_generation_script
........\nios_log.txt
........\nios_setup_quartus.tcl
........\pio_led.v
........\pll.sdc
........\pll.v
........\setup.tcl
........\setup.tcl.bak
........\sopc_add_qip_file.tcl
........\sopc_builder_log.txt
........\sysid.v
........\testbench\ddr_sdram_example_top_tb.v
........\.........\ddr_sdram_example_top_tb.v.tmp2
........\.........\ddr_sdram_example_top_tb_1.v
........\.........\ddr_sdram_mem_model.v
........\sram_512x16bit\cb_generator.pl
........\..............\sram_512x16bit_hw.tcl
........\.oftware\hello_led_0_syslib\.cdtbuild
    

CodeBus www.codebus.net