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Title: shilidaima(Altera_Verilog) Download
 Description: (Altera_Verilog) sample code, there are eight examples of the basis for learning FPGA
 Downloaders recently: [More information of uploader 859972334]
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示例代码(Altera_Verilog)\01-LED显示实验\led_test\led_test.asm.rpt
........................\..............\........\led_test.cdf
........................\..............\........\led_test.done
........................\..............\........\led_test.dpf
........................\..............\........\led_test.fit.rpt
........................\..............\........\led_test.fit.smsg
........................\..............\........\led_test.fit.summary
........................\..............\........\led_test.flow.rpt
........................\..............\........\led_test.map.rpt
........................\..............\........\led_test.map.summary
........................\..............\........\led_test.pin
........................\..............\........\led_test.pof
........................\..............\........\led_test.qpf
........................\..............\........\led_test.qsf
........................\..............\........\led_test.qws
........................\..............\........\led_test.sof
........................\..............\........\led_test.tan.rpt
........................\..............\........\topdesign.v
........................\..............\........\topdesign.v.bak
........................\..............\........\db\led_test.asm.qmsg
........................\..............\........\..\led_test.cbx.xml
........................\..............\........\..\led_test.cmp.bpm
........................\..............\........\..\led_test.cmp.cdb
........................\..............\........\..\led_test.cmp.ecobp
........................\..............\........\..\led_test.cmp.hdb
........................\..............\........\..\led_test.cmp.kpt
........................\..............\........\..\led_test.cmp.logdb
........................\..............\........\..\led_test.cmp.rdb
........................\..............\........\..\led_test.cmp.tdb
........................\..............\........\..\led_test.cmp0.ddb
........................\..............\........\..\led_test.cmp_merge.kpt
........................\..............\........\..\led_test.db_info
........................\..............\........\..\led_test.eco.cdb
........................\..............\........\..\led_test.fit.qmsg
........................\..............\........\..\led_test.hier_info
........................\..............\........\..\led_test.hif
........................\..............\........\..\led_test.lpc.html
........................\..............\........\..\led_test.lpc.rdb
........................\..............\........\..\led_test.lpc.txt
........................\..............\........\..\led_test.map.bpm
........................\..............\........\..\led_test.map.cdb
........................\..............\........\..\led_test.map.ecobp
........................\..............\........\..\led_test.map.hdb
........................\..............\........\..\led_test.map.kpt
........................\..............\........\..\led_test.map.logdb
........................\..............\........\..\led_test.map.qmsg
........................\..............\........\..\led_test.map_bb.cdb
........................\..............\........\..\led_test.map_bb.hdb
........................\..............\........\..\led_test.map_bb.logdb
........................\..............\........\..\led_test.pre_map.cdb
........................\..............\........\..\led_test.pre_map.hdb
........................\..............\........\..\led_test.rtlv.hdb
........................\..............\........\..\led_test.rtlv_sg.cdb
........................\..............\........\..\led_test.rtlv_sg_swap.cdb
........................\..............\........\..\led_test.sgdiff.cdb
........................\..............\........\..\led_test.sgdiff.hdb
........................\..............\........\..\led_test.sld_design_entry.sci
........................\..............\........\..\led_test.sld_design_entry_dsc.sci
........................\..............\........\..\led_test.syn_hier_info
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