FlashROM实验\Source File\FlashROM_Out.v
............\...........\Flash_ROM_Ctr.v
............\...........\Flash_ROM_Top.v
............\Project\Flash_ROM\Flash_ROM.prj
............\.......\.........\viewdraw\viewdraw.ini
............\.......\.........\........\.f\project.lst
............\.......\.........\synthesis\.recordref
............\.......\.........\.........\FlashROM16.areasrr
............\.......\.........\.........\FlashROM16.edn
............\.......\.........\.........\FlashROM16.fse
............\.......\.........\.........\FlashROM16.htm
............\.......\.........\.........\FlashROM16.map
............\.......\.........\.........\FlashROM16.sap
............\.......\.........\.........\FlashROM16.sdf
............\.......\.........\.........\FlashROM16.srd
............\.......\.........\.........\FlashROM16.srm
............\.......\.........\.........\FlashROM16.srr
............\.......\.........\.........\FlashROM16.srs
............\.......\.........\.........\FlashROM16.tlg
............\.......\.........\.........\FlashROM16_drc.rpt
............\.......\.........\.........\FlashROM16_sdc.sdc
............\.......\.........\.........\FlashROM16_syn.prj
............\.......\.........\.........\Flash_ROM_Top.areasrr
............\.......\.........\.........\Flash_ROM_Top.edn
............\.......\.........\.........\Flash_ROM_Top.fse
............\.......\.........\.........\Flash_ROM_Top.htm
............\.......\.........\.........\Flash_ROM_Top.map
............\.......\.........\.........\Flash_ROM_Top.sap
............\.......\.........\.........\Flash_ROM_Top.sdf
............\.......\.........\.........\Flash_ROM_Top.srd
............\.......\.........\.........\Flash_ROM_Top.srm
............\.......\.........\.........\Flash_ROM_Top.srr
............\.......\.........\.........\Flash_ROM_Top.srs
............\.......\.........\.........\Flash_ROM_Top.tlg
............\.......\.........\.........\Flash_ROM_Top_drc.rpt
............\.......\.........\.........\Flash_ROM_Top_sdc.sdc
............\.......\.........\.........\Flash_ROM_Top_syn.prj
............\.......\.........\.........\stdout.log
............\.......\.........\.........\traplog.tlg
............\.......\.........\.........\syntmp\FlashROM16.msg
............\.......\.........\.........\......\FlashROM16.plg
............\.......\.........\.........\......\FlashROM16_flink.htm
............\.......\.........\.........\......\FlashROM16_srr.htm
............\.......\.........\.........\......\FlashROM16_toc.htm
............\.......\.........\.........\......\Flash_ROM_Top.msg
............\.......\.........\.........\......\Flash_ROM_Top.plg
............\.......\.........\.........\......\Flash_ROM_Top_flink.htm
............\.......\.........\.........\......\Flash_ROM_Top_srr.htm
............\.......\.........\.........\......\Flash_ROM_Top_toc.htm
............\.......\.........\.........\......\sap.log
............\.......\.........\.timulus\BtimErrors.log
............\.......\.........\........\Flash_ROM_Top.dsk
............\.......\.........\........\Flash_ROM_Top.hpj
............\.......\.........\........\files_to_build.txt
............\.......\.........\........\waveperl.log
............\.......\.........\.martgen\FlashROM16_work.ixf
............\.......\.........\........\smartgen.aws
............\.......\.........\........\FlashROM16\FlashROM16.cxf
............\.......\.........\........\..........\FlashROM16.gen
............\.......\.........\........\..........\FlashROM16.log
............\.......\.........\........\..........\FlashROM16.mem
............\.......\.........\........\..........\FlashROM16.ufc
............\.......\.........\........\..........\FlashROM16.v
............\.......\.........\........\..........\hdlsynchk.tcl
............\.......\.........\.imulation\FlashROM16.mem
............\.......\.........\..........\meminit.dat
............\.......\.........\..........\modelsim.ini
............\.......\.........\..........\modelsim.ini.sav
............\.......\.........\..........\modelsim.log
............\.......\.........\..........\v