Description: The project is mainly used for SRAM FPGA to a quick and easy operation, use the chips IS62LV256-70U, the file containing the chip' s datasheet
To Search:
- [sram] - SRAM read and write small programs using
- [vga_system] - FPGA examples SDRAM read and write, can
- [63535309sram] - SRAM read and write verilog source code
File list (Check if you may need any files):
FPGA_SDRAM\datasheet\042174sdr_product_guide_nov_07.pdf
..........\.........\044975sdr_device_operation_jul_06.pdf
..........\.........\299156SDRAM_code.pdf
..........\.........\678733sdr_timing_diagram_feb_04.pdf
..........\.........\ds_k4s64xx32k_rev11.pdf
..........\.........\reference_verilog\README.v
..........\.........\.................\SDRSD50_071010.v
..........\sdram_mdl\datagene.v
..........\.........\.b\add_sub_918.tdf
..........\.........\..\add_sub_gub.tdf
..........\.........\..\add_sub_se8.tdf
..........\.........\..\altsyncram_1lh1.tdf
..........\.........\..\alt_synch_pipe_oc8.tdf
..........\.........\..\alt_synch_pipe_pc8.tdf
..........\.........\..\alt_sync_fifo_0fm.tdf
..........\.........\..\alt_sync_fifo_0oi.tdf
..........\.........\..\a_fefifo_ctc.tdf
..........\.........\..\a_fefifo_htc.tdf
..........\.........\..\a_gray2bin_q4b.tdf
..........\.........\..\a_graycounter_u06.tdf
..........\.........\..\cntr_cta.tdf
..........\.........\..\cntr_kua.tdf
..........\.........\..\dcfifo_35l1.tdf
..........\.........\..\dcfifo_o2l1.tdf
..........\.........\..\dffpipe_gd9.tdf
..........\.........\..\dffpipe_id9.tdf
..........\.........\..\dffpipe_jd9.tdf
..........\.........\..\dpram_6o31.tdf
..........\.........\..\prev_cmp_sdr_test.asm.qmsg
..........\.........\..\prev_cmp_sdr_test.eda.qmsg
..........\.........\..\prev_cmp_sdr_test.fit.qmsg
..........\.........\..\prev_cmp_sdr_test.map.qmsg
..........\.........\..\prev_cmp_sdr_test.qmsg
..........\.........\..\prev_cmp_sdr_test.sta.qmsg
..........\.........\..\sdr_test.db_info
..........\.........\..\sdr_test.eco.cdb
..........\.........\..\sdr_test.sld_design_entry.sci
..........\.........\..\sdr_test_global_asgn_op.abo
..........\.........\incremental_db\compiled_partitions\sdr_test.root_partition.cmp.atm
..........\.........\..............\...................\sdr_test.root_partition.cmp.cdb
..........\.........\..............\...................\sdr_test.root_partition.cmp.dfp
..........\.........\..............\...................\sdr_test.root_partition.cmp.hdb
..........\.........\..............\...................\sdr_test.root_partition.cmp.hdbx
..........\.........\..............\...................\sdr_test.root_partition.cmp.kpt
..........\.........\..............\...................\sdr_test.root_partition.cmp.logdb
..........\.........\..............\...................\sdr_test.root_partition.cmp.rcf
..........\.........\..............\...................\sdr_test.root_partition.cmp.rcfdb
..........\.........\..............\...................\sdr_test.root_partition.map.atm
..........\.........\..............\...................\sdr_test.root_partition.map.cdb
..........\.........\..............\...................\sdr_test.root_partition.map.dpi
..........\.........\..............\...................\sdr_test.root_partition.map.hdb
..........\.........\..............\...................\sdr_test.root_partition.map.hdbx
..........\.........\..............\...................\sdr_test.root_partition.map.kpt
..........\.........\..............\...................\sdr_test.root_partition.merge_hb.atm
..........\.........\..............\README
..........\.........\init_state_r.jpg
..........\.........\PLL_ctrl.bsf
..........\.........\PLL_ctrl.ppf
..........\.........\PLL_ctrl.qip
..........\.........\PLL_ctrl.v
..........\.........\PLL_ctrl_bb.v
..........\.........\PLL_ctrl_inst.v
..........\.........\PLL_ctrl_wave0.jpg
..........\.........\PLL_ctrl_waveforms.html
..........\.........\rdfifo.bsf
..........\.........\rdfifo.qip
..........\.........\rdfifo.v
..........\.........\rdfifo_bb.v
..........\.........\rdfifo_inst.v
..........\.........\rdfifo_wave0.jpg
..........\.........\rdfifo_waveforms.html
..........\.........\sdfifo_ctrl.v
..........\.........\sdfifo_ctrl_uut_sdffifoctrl.jpg
..........\.........\sdram_cmd.v
..........\.........\sdram_ctrl.v
..........\.........\sdram_top.v
..........\.........\sdram_top_uut_sdramtop.jpg
..........\.........\sdram_wr_data.v
..........\.........\sdr_para.v
..........\.........\sdr_test.asm.rpt
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