Welcome![Sign In][Sign Up]
Location:
Downloads SourceCode Embeded-SCM Develop VHDL-FPGA-Verilog
Title: jiaotongdeng Download
 Description: Functions to achieve a crossroads traffic lights, traffic lights and countdown at different times, including the preparation of the main components VHDL, and download scanning circuit.
 Downloaders recently: [More information of uploader 853213622]
 To Search:
File list (Check if you may need any files):
实验六(交通灯)\control\control.asm.rpt
..............\.......\control.done
..............\.......\control.fit.rpt
..............\.......\control.fit.summary
..............\.......\control.flow.rpt
..............\.......\control.map.rpt
..............\.......\control.map.summary
..............\.......\control.pin
..............\.......\control.pof
..............\.......\control.qpf
..............\.......\control.qsf
..............\.......\control.qws
..............\.......\control.sof
..............\.......\control.tan.rpt
..............\.......\control.tan.summary
..............\.......\control.vhd
..............\.......\control.vhd.bak
..............\.......\db\add_sub_dnh.tdf
..............\.......\..\control.asm.qmsg
..............\.......\..\control.cbx.xml
..............\.......\..\control.cmp.cdb
..............\.......\..\control.cmp.hdb
..............\.......\..\control.cmp.logdb
..............\.......\..\control.cmp.rdb
..............\.......\..\control.cmp.tdb
..............\.......\..\control.cmp0.ddb
..............\.......\..\control.db_info
..............\.......\..\control.eco.cdb
..............\.......\..\control.fit.qmsg
..............\.......\..\control.hier_info
..............\.......\..\control.hif
..............\.......\..\control.lpc.html
..............\.......\..\control.lpc.rdb
..............\.......\..\control.lpc.txt
..............\.......\..\control.map.cdb
..............\.......\..\control.map.hdb
..............\.......\..\control.map.logdb
..............\.......\..\control.map.qmsg
..............\.......\..\control.pre_map.cdb
..............\.......\..\control.pre_map.hdb
..............\.......\..\control.rtlv.hdb
..............\.......\..\control.rtlv_sg.cdb
..............\.......\..\control.rtlv_sg_swap.cdb
..............\.......\..\control.sgdiff.cdb
..............\.......\..\control.sgdiff.hdb
..............\.......\..\control.sld_design_entry.sci
..............\.......\..\control.sld_design_entry_dsc.sci
..............\.......\..\control.syn_hier_info
..............\.......\..\control.tan.qmsg
..............\.......\..\control.tis_db_list.ddb
..............\.......\..\control.tmw_info
..............\.......\..\prev_cmp_control.asm.qmsg
..............\.......\..\prev_cmp_control.fit.qmsg
..............\.......\..\prev_cmp_control.map.qmsg
..............\.......\..\prev_cmp_control.qmsg
..............\.......\..\prev_cmp_control.tan.qmsg
..............\.......\incremental_db\compiled_partitions\control.root_partition.map.kpt
..............\.......\..............\README
..............\fwq2_1\db\add_sub_a9c.tdf
..............\......\..\add_sub_b9c.tdf
..............\......\..\add_sub_c9c.tdf
..............\......\..\add_sub_d9c.tdf
..............\......\..\add_sub_e9c.tdf
..............\......\..\add_sub_t8h.tdf
..............\......\..\alt_u_div_cke.tdf
..............\......\..\fwq2_1.asm.qmsg
..............\......\..\fwq2_1.cbx.xml
..............\......\..\fwq2_1.cmp.cdb
..............\......\..\fwq2_1.cmp.hdb
..............\......\..\fwq2_1.cmp.logdb
..............\......\..\fwq2_1.cmp.rdb
..............\......\..\fwq2_1.cmp.tdb
..............\......\..\fwq2_1.cmp0.ddb
..............\......\..\fwq2_1.db_info
..............\......\..\fwq2_1.eco.cdb
..............\......\..\fwq2_1.fit.qmsg
..............\......\..\fwq2_1.hier_info
..............\......\..\fwq2_1.hif
..............\......\..\fwq2_1.lpc.html
..............\......\..\fwq2_1.lpc.rdb
..............\......\..\fwq2_1.lpc.txt
..............\......\..\fwq2_1.map.cdb
..............\......\..\fwq2_1.map.hdb
..............\......\..\fwq2_1.map.logdb
..............\......\..\fwq2_1.map.qmsg
..............\......\..\fwq2_1.pre_map.cdb
..............\......\..\fwq2_1.pre_map.hdb
..............\......\..\fwq2_1.rtlv.hdb
..............\......\..\fwq2_1.rtlv_sg.cdb
..............\......\..\fwq2_1.rtlv_sg_swap.cdb
..............\......\..\fwq2_1.sgdiff.cdb
..............\......\..\fwq2_1.sgdiff.hdb
..............\......\..\fwq2_1.sld_design_entry.sci
..............\......\..\fwq2_1.sld_design_entry_dsc.sci
..............\......\..\fwq2_1.syn_hi

CodeBus www.codebus.net