Welcome![Sign In][Sign Up]
Location:
Downloads SourceCode Embeded-SCM Develop VHDL-FPGA-Verilog
Title: FP-AND-DIPLAY Download
 Description: VHDL divider, divide the input MHz frequency of the order of magnitude, to get the required Hz magnitude frequency. Segment digital tube display program: the output of decoding, via digital display.
 Downloaders recently: [More information of uploader hhy6361]
 To Search:
File list (Check if you may need any files):
DIPLAY.vhd
FP.vhd
    

CodeBus www.codebus.net