exercise_2.1\NI_R_Series  Hardware\Ex 2 1 optional.vi
............\.....................\Ex 2 1_Spartan3E.vi
............\.....................\Exercise 21.aliases
............\.....................\Exercise 21.lvproj
............\.....................\FPGA Bitfiles\Exercise 21.lvproj_FPGA Target_Ex 2 1 optional.vi.lvbit
............\.....................\.............\Exercise 21.lvproj_FPGA Target_Ex 2 1.vi.lvbit
............\.....................\Readme 21.txt
............\Spartan_3E\Example 1\FPGA Bitfiles\Shift.lvproj_FPGA Target_Shift.vi.lvbit
............\..........\.........\.............\Shift.lvproj_FPGA Target_Untitled 4.vi.lvbit
............\..........\.........\readme.txt
............\..........\.........\Shift.aliases
............\..........\.........\Shift.lvproj
............\..........\.........\Shift.vi
............\..........\........2\BooleanByte.vi
............\..........\.........\Configuration.vi
............\..........\.........\FPGA Bitfiles\fpgaLCD.lvproj_FPGA Target_PadWrite.vi.lvbit
............\..........\.........\.............\fpgaLCD.lvproj_FPGA Target_WriteToCGRAM.vi.lvbit
............\..........\.........\.............\fpgaLCD.lvproj_FPGA Target_WriteToDDRAM.vi.lvbit
............\..........\.........\fpgaLCD.aliases
............\..........\.........\fpgaLCD.lvproj
............\..........\.........\Function.vi
............\..........\.........\Initialization.vi
............\..........\.........\PadWrite.vi
............\..........\.........\PadWriteHost.vi
............\..........\.........\readme.txt
............\..........\.........\WriteToCGRAM.vi
............\..........\.........\WriteToDDRAM.vi
............\..........\........1\FPGA Bitfiles
............\..........\........2\FPGA Bitfiles
............\NI_R_Series  Hardware\FPGA Bitfiles
............\Spartan_3E\Example 1
............\..........\Example 2
............\NI_R_Series  Hardware
............\Spartan_3E
exercise_2.1