Description: To design a washing machine controllers, washing machines for the following operation: time to start-> forward 20 seconds-> pause 10 seconds- 20 seconds> reverse-> pause 10 seconds-> Timed less than repeat the above process.
(2) If from time to time to stop and an audible signal.
(3) with two digital tube display washing preset time (minutes) washing process according to the countdown time display until the time to stop washing process from the start signal.
(4) three LED indicates the forward, reverse, pause, three states.
The main requirements of the design are:
(1) to write the appropriate code based on design topics
(2) written in VHDL code compilation and simulation.
(3) the use of the experimental box to complete the hardware verification (optional)
(4) summarizes the design and content, and completion of the course design specification
To Search:
File list (Check if you may need any files):
xiyiji(周小龙)\cnt10a1.vhd
...............\cnt10a1.vhd.bak
...............\cnt10a1.vwf
...............\cnt5a.vhd
...............\cnt5a.vhd.bak
...............\cnt5a.vwf
...............\cnt60a.vhd
...............\cnt60a.vhd.bak
...............\db\add_sub_lkc.tdf
...............\..\add_sub_mkc.tdf
...............\..\alt_u_div_gve.tdf
...............\..\alt_u_div_kve.tdf
...............\..\lpm_divide_05m.tdf
...............\..\lpm_divide_25m.tdf
...............\..\lpm_divide_tcm.tdf
...............\..\lpm_divide_vcm.tdf
...............\..\mux_joc.tdf
...............\..\mux_t4d.tdf
...............\..\prev_cmp_xiyiji.asm.qmsg
...............\..\prev_cmp_xiyiji.fit.qmsg
...............\..\prev_cmp_xiyiji.map.qmsg
...............\..\prev_cmp_xiyiji.qmsg
...............\..\prev_cmp_xiyiji.sim.qmsg
...............\..\prev_cmp_xiyiji.tan.qmsg
...............\..\sign_div_unsign_7kh.tdf
...............\..\sign_div_unsign_9kh.tdf
...............\..\wed.wsf
...............\..\xiyiji.db_info
...............\..\xiyiji.eco.cdb
...............\..\xiyiji.sim_ori.vwf
...............\..\xiyiji.sld_design_entry.sci
...............\..\xiyijizongti.bdf
...............\dff3xin.v
...............\dff3xin.v.bak
...............\jishuqi10.v
...............\jishuqi10.v.bak
...............\jishuqi24.v
...............\jishuqi24.v.bak
...............\jishuqi6.v
...............\jishuqi60.v
...............\jishuqi60.v.bak
...............\jishuqi60.vwf
...............\jishuqifen.v
...............\jishuqifen.v.bak
...............\seg7.v
...............\seg7.v.bak
...............\shumaguan.bsf
...............\shumaguan.v
...............\shumaguan.v.bak
...............\shumaguan.vwf
...............\timectr_clkdiv.bsf
...............\timectr_clkdiv.v
...............\timectr_clkdiv.v.bak
...............\timectr_clkdiv.vhd
...............\timectr_clkdiv.vwf
...............\timeronoff_ctr.vhd
...............\timeronoff_ctr.vhd.bak
...............\timeronoff_ctr.vwf
...............\timer_count.vhd
...............\timer_count.vhd.bak
...............\timer_count.vwf
...............\timer_ctr.bsf
...............\timer_ctr.vhd
...............\timer_ctr.vwf
...............\timer_sum.bsf
...............\timer_sum.vhd
...............\timer_sum.vhd.bak
...............\xiyiji.asm.rpt
...............\xiyiji.done
...............\xiyiji.dpf
...............\xiyiji.fit.rpt
...............\xiyiji.fit.smsg
...............\xiyiji.fit.summary
...............\xiyiji.flow.rpt
...............\xiyiji.map.rpt
...............\xiyiji.map.summary
...............\xiyiji.pin
...............\xiyiji.pof
...............\xiyiji.qpf
...............\xiyiji.qsf
...............\xiyiji.qsf.bak
...............\xiyiji.qws
...............\xiyiji.sim.rpt
...............\xiyiji.sof
...............\xiyiji.tan.rpt
...............\xiyiji.tan.summary
...............\xiyiji.vwf
...............\xiyiji_assignment_defaults.qdf
...............\烧写进开发板使用说明.doc
...............\db
xiyiji(周小龙)