Description: Controller source code using verilog HDL written in the sdram (SDR), has good portability, test examples via the QuartusII 9.0 compiler, you can run in cyclone
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Sdram_Control_4Port\command.v
...................\control_interface.v
...................\Sdram_Control_4Port.v
...................\Sdram_Control_4Port.v.bak
...................\Sdram_Params.h
...................\Sdram_PLL.bsf
...................\Sdram_PLL.ppf
...................\Sdram_PLL.v
...................\Sdram_RD_FIFO.v
...................\Sdram_WR_FIFO.v
...................\sdr_data_path.v
Sdram_Control_4Port