Description: In Quartus Ⅱ software environment, utilizing laboratory integrated chips, use VHDL language programming simulating a washing machine control system of basic function.
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xyj
...\cmp_state.ini
...\db
...\..\add_sub_snh.tdf
...\..\add_sub_uch.tdf
...\..\total.fit.qmsg
...\..\total.asm.qmsg
...\..\total.tan.qmsg
...\..\total.sld_design_entry.sci
...\..\total.cmp.rdb
...\..\total.map.hdb
...\..\total.map.qmsg
...\..\total.db_info
...\..\total.rtlv_sg_swap.cdb
...\..\total.hier_info
...\..\total.hif
...\..\total.pre_map.hdb
...\..\total.sgdiff.cdb
...\..\total.sgdiff.hdb
...\..\total.rtlv.hdb
...\..\total.rtlv_sg.cdb
...\..\total.project.hdb
...\..\total.sld_design_entry_dsc.sci
...\..\total.map.cdb
...\..\total.cmp.cdb
...\..\total.cmp.hdb
...\..\total.cmp.tdb
...\..\total.cmp.ddb
...\..\total.syn_hier_info
...\..\total_cmp.qrpt
...\divclk10.vhd
...\divclk1000.vhd
...\key.vhd
...\keyin.vhd
...\leddecoder.vhd
...\leddecoder2.vhd
...\tell.vhd
...\timeshowset.vhd
...\total.asm.rpt
...\total.done
...\total.fit.eqn
...\total.fit.rpt
...\total.fit.summary
...\total.flow.rpt
...\total.map.eqn
...\total.map.rpt
...\total.map.summary
...\total.pin
...\total.pof
...\total.qpf
...\total.qsf
...\total.qws
...\total.tan.rpt
...\total.tan.summary
...\xyj.vhd
...\ym.vhd
...\total.cdf
...\total.vhd