FPGA0
.....\ADC_port.bsf
.....\ADC_port.inc
.....\ADC_port.v
.....\ADC_port.v.bak
.....\db
.....\..\FPGA.cbx.xml
.....\..\FPGA.cmp.rdb
.....\..\FPGA.db_info
.....\..\FPGA.eco.cdb
.....\..\FPGA.fnsim.qmsg
.....\..\FPGA.hif
.....\..\FPGA.map.qmsg
.....\..\FPGA.map_bb.hdb
.....\..\FPGA.pre_map.hdb
.....\..\FPGA.sld_design_entry.sci
.....\..\FPGA.smart_action.txt
.....\..\FPGA.tis_db_list.ddb
.....\..\logic_util_heursitic.dat
.....\..\prev_cmp_FPGA.map.qmsg
.....\..\prev_cmp_FPGA.qmsg
.....\FPGA.bdf
.....\FPGA.done
.....\FPGA.dpf
.....\FPGA.flow.rpt
.....\FPGA.map.rpt
.....\FPGA.map.smsg
.....\FPGA.map.summary
.....\FPGA.qpf
.....\FPGA.qsf
.....\FPGA.qws
.....\incremental_db
.....\..............\compiled_partitions
.....\..............\README
.....\OprateSRAM.bsf
.....\OprateSRAM.v
.....\OprateSRAM.v.bak