File list (Check if you may need any files):
Verilog改名字-仿真-未调试
.........................\M_IdtBehavModel.v
.........................\M_IdtConfig_Top.ucf
.........................\M_IdtConfig_Top.v
.........................\M_IdtConfig_tb.v
.........................\M_IdtControl.v
.........................\M_IdtDataGen.v
.........................\M_IdtFifo.v
.........................\M_IdtFifo.xco
.........................\M_IdtFifo备注.txt
.........................\M_IdtIIC_BitGen.v
.........................\M_IdtIIC_ByteGen.v
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