Welcome![Sign In][Sign Up]
Location:
Downloads SourceCode Embeded-SCM Develop VHDL-FPGA-Verilog
Title: test_uart2 Download
 Description: Serial transceiver, the number of input data from the PC through the digital display
 Downloaders recently: [More information of uploader 799045252]
 To Search:
File list (Check if you may need any files):
test_uart2
..........\count16.vhd
..........\Counter.vhd
..........\db
..........\..\prev_cmp_test_uart_tx.asm.qmsg
..........\..\prev_cmp_test_uart_tx.fit.qmsg
..........\..\prev_cmp_test_uart_tx.map.qmsg
..........\..\prev_cmp_test_uart_tx.qmsg
..........\..\prev_cmp_test_uart_tx.sim.qmsg
..........\..\prev_cmp_test_uart_tx.tan.qmsg
..........\..\test_uart_tx.asm.qmsg
..........\..\test_uart_tx.cbx.xml
..........\..\test_uart_tx.cmp.cdb
..........\..\test_uart_tx.cmp.hdb
..........\..\test_uart_tx.cmp.logdb
..........\..\test_uart_tx.cmp.rdb
..........\..\test_uart_tx.cmp.tdb
..........\..\test_uart_tx.cmp0.ddb
..........\..\test_uart_tx.dbp
..........\..\test_uart_tx.db_info
..........\..\test_uart_tx.eco.cdb
..........\..\test_uart_tx.fit.qmsg
..........\..\test_uart_tx.hier_info
..........\..\test_uart_tx.hif
..........\..\test_uart_tx.map.cdb
..........\..\test_uart_tx.map.hdb
..........\..\test_uart_tx.map.logdb
..........\..\test_uart_tx.map.qmsg
..........\..\test_uart_tx.pre_map.cdb
..........\..\test_uart_tx.pre_map.hdb
..........\..\test_uart_tx.psp
..........\..\test_uart_tx.pss
..........\..\test_uart_tx.rpp.qmsg
..........\..\test_uart_tx.rtlv.hdb
..........\..\test_uart_tx.rtlv_sg.cdb
..........\..\test_uart_tx.rtlv_sg_swap.cdb
..........\..\test_uart_tx.sgate.rvd
..........\..\test_uart_tx.sgate_sm.rvd
..........\..\test_uart_tx.sgdiff.cdb
..........\..\test_uart_tx.sgdiff.hdb
..........\..\test_uart_tx.signalprobe.cdb
..........\..\test_uart_tx.sld_design_entry.sci
..........\..\test_uart_tx.sld_design_entry_dsc.sci
..........\..\test_uart_tx.syn_hier_info
..........\..\test_uart_tx.tan.qmsg
..........\..\test_uart_tx.tis_db_list.ddb
..........\..\wed.wsf
..........\..\wed.zsf
..........\Rxunit.vhd
..........\synchroniser.vhd
..........\test_uart.vhd
..........\test_uart2.zip
..........\test_uart_tx.asm.rpt
..........\test_uart_tx.cdf
..........\test_uart_tx.done
..........\test_uart_tx.dpf
..........\test_uart_tx.fit.rpt
..........\test_uart_tx.fit.smsg
..........\test_uart_tx.fit.summary
..........\test_uart_tx.flow.rpt
..........\test_uart_tx.map.rpt
..........\test_uart_tx.map.summary
..........\test_uart_tx.pin
..........\test_uart_tx.pof
..........\test_uart_tx.qpf
..........\test_uart_tx.qsf
..........\test_uart_tx.qws
..........\test_uart_tx.sim.rpt
..........\test_uart_tx.sof
..........\test_uart_tx.tan.rpt
..........\test_uart_tx.tan.summary
..........\test_uart_tx.vwf
..........\test_uart_tx_assignment_defaults.qdf
..........\test_uart_tx_description.txt
..........\Txunit.vhd
..........\uart.vhd
..........\部分引脚锁定.txt
    

CodeBus www.codebus.net