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Title: 74serie-code Download
 Description: Prepared by flash controller vhdL source code. Contains testbench. Programming Language:VHDL, Tags:VHDL-FPGA-Verilog,
 Downloaders recently: [More information of uploader 849943030]
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File list (Check if you may need any files):
exam\74138\74138.done
....\.....\74138.flow.rpt
....\.....\74138.map.rpt
....\.....\74138.map.summary
....\.....\74138.qsf
....\.....\74138.v
....\.....\74138.v.bak
....\.....\74hc138.pdf
....\.....\db\74138.cbx.xml
....\.....\..\74138.cmp.rdb
....\.....\..\74138.cmp_merge.kpt
....\.....\..\74138.db_info
....\.....\..\74138.hier_info
....\.....\..\74138.hif
....\.....\..\74138.lpc.html
....\.....\..\74138.lpc.rdb
....\.....\..\74138.lpc.txt
....\.....\..\74138.map.bpm
....\.....\..\74138.map.cdb
....\.....\..\74138.map.hdb
....\.....\..\74138.map.kpt
....\.....\..\74138.map.logdb
....\.....\..\74138.map.qmsg
....\.....\..\74138.map_bb.cdb
....\.....\..\74138.map_bb.hdb
....\.....\..\74138.map_bb.logdb
....\.....\..\74138.pre_map.cdb
....\.....\..\74138.pre_map.hdb
....\.....\..\74138.rpp.qmsg
....\.....\..\74138.rtlv.hdb
....\.....\..\74138.rtlv_sg.cdb
....\.....\..\74138.rtlv_sg_swap.cdb
....\.....\..\74138.sgate.rvd
....\.....\..\74138.sgate_sm.rvd
....\.....\..\74138.sgdiff.cdb
....\.....\..\74138.sgdiff.hdb
....\.....\..\74138.sld_design_entry.sci
....\.....\..\74138.sld_design_entry_dsc.sci
....\.....\..\74138.smart_action.txt
....\.....\..\74138.syn_hier_info
....\.....\..\74138.tis_db_list.ddb
....\.....\..\74138.tmw_info
....\.....\..\logic_util_heursitic.dat
....\.....\..\prev_cmp_74138.qmsg
....\.....\incremental_db\compiled_partitions\74138.db_info
....\.....\..............\...................\74138.root_partition.map.cdb
....\.....\..............\...................\74138.root_partition.map.dpi
....\.....\..............\...................\74138.root_partition.map.hdb
....\.....\..............\...................\74138.root_partition.map.kpt
....\.....\..............\README
....\.....\run.do
....\.....\s_74138.cr.mti
....\.....\s_74138.mpf
....\.....\s_74138.qpf
....\.....\s_74138.xml
....\.....\s_74138_tb.v
....\.....\s_74138_tb.v.bak
....\.....\vsim.wlf
....\.....\work\s_74138\verilog.asm
....\.....\....\.......\_primary.dat
....\.....\....\.......\_primary.dbs
....\.....\....\.......\_primary.vhd
....\.....\....\......._tb\verilog.asm
....\.....\....\..........\_primary.dat
....\.....\....\..........\_primary.dbs
....\.....\....\..........\_primary.vhd
....\.....\....\_info
....\.....\....\.opt\vopt2iexfg
....\.....\....\....\vopt524tfg
....\.....\....\....\vopt9isqfg
....\.....\....\....\voptg13egg
....\.....\....\....\voptg29gze
....\.....\....\....\voptjhragg
....\.....\....\....\voptkiydze
....\.....\....\....\voptq2kaze
....\.....\....\....\voptqkm7zd
....\.....\....\....\voptyhx00f
....\.....\....\....\_deps
....\.....\....\.temp\vlog32g9ff
....\.....\....\.....\vlog3zcsfj
....\.....\....\.....\vlogc0a856
....\...64\74hc164.pdf
....\.....\db\logic_util_heursitic.dat
....\.....\..\prev_cmp_s_74164.qmsg
....\.....\..\s_74164.cbx.xml
....\.....\..\s_74164.cmp.rdb
....\.....\..\s_74164.cmp_merge.kpt
....\.....\..\s_74164.db_info
....\.....\..\s_74164.hier_info
....\.....\..\s_74164.hif
....\.....\..\s_74164.lpc.html
....\.....\..\s_74164.lpc.rdb
....\.....\..\s_74164.lpc.txt
....\.....\..\s_74164.map.bpm
....\.....\..\s_74164.map.cdb
....\.....\..\s_74164.map.hdb
....\.....\..\s_74164.map.kpt
....\.....\..\s_74164.map.logdb
....\.....\..\s_74164.map.qmsg
....\.....\..\s_74164.map_bb.cdb
    

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