Welcome![Sign In][Sign Up]
Location:
Downloads SourceCode Embeded-SCM Develop VHDL-FPGA-Verilog
Title: success01 Download
 Description: 1, can be split-screen display hours, minutes, seconds, used digital tube decimal point "." Instead of hours, minutes, seconds separator ":" split-screen display is As the digital only four, can not display hours, minutes, seconds, but can only display hours, minutes, or only minutes, seconds, to cut through the key For both display 2, the clock can be set to the beginning of time. Settings, the corresponding LED to flash, indicating the location of the current settings (content) 3, with the alarm function, you can set the alarm time. Time to alarm, LED flashes to indicate.
 Downloaders recently: [More information of uploader 1124066365]
 To Search:
File list (Check if you may need any files):
success01
.........\alart.bsf
.........\alart.vhd
.........\alart.vhd.bak
.........\compare.vhd
.........\compare.vhd.bak
.........\contrl.bsf
.........\contrl.vhd
.........\contrl.vhd.bak
.........\count24.vhd
.........\count24.vhd.bak
.........\count4.vhd
.........\count60.vhd
.........\count60.vhd.bak
.........\db
.........\..\eclock.asm.qmsg
.........\..\eclock.asm.rdb
.........\..\eclock.asm_labs.ddb
.........\..\eclock.cbx.xml
.........\..\eclock.cmp.bpm
.........\..\eclock.cmp.cdb
.........\..\eclock.cmp.ecobp
.........\..\eclock.cmp.hdb
.........\..\eclock.cmp.kpt
.........\..\eclock.cmp.rdb
.........\..\eclock.cmp.tdb
.........\..\eclock.cmp0.ddb
.........\..\eclock.cmp2.ddb
.........\..\eclock.cmp_merge.kpt
.........\..\eclock.db_info
.........\..\eclock.eco.cdb
.........\..\eclock.fit.qmsg
.........\..\eclock.hier_info
.........\..\eclock.hif
.........\..\eclock.lpc.html
.........\..\eclock.lpc.rdb
.........\..\eclock.lpc.txt
.........\..\eclock.map.bpm
.........\..\eclock.map.cdb
.........\..\eclock.map.ecobp
.........\..\eclock.map.hdb
.........\..\eclock.map.kpt
.........\..\eclock.map.qmsg
.........\..\eclock.map_bb.cdb
.........\..\eclock.map_bb.hdb
.........\..\eclock.pre_map.cdb
.........\..\eclock.pre_map.hdb
.........\..\eclock.rtlv.hdb
.........\..\eclock.rtlv_sg.cdb
.........\..\eclock.rtlv_sg_swap.cdb
.........\..\eclock.sgdiff.cdb
.........\..\eclock.sgdiff.hdb
.........\..\eclock.sld_design_entry.sci
.........\..\eclock.sld_design_entry_dsc.sci
.........\..\eclock.smart_action.txt
.........\..\eclock.smp_dump.txt
.........\..\eclock.syn_hier_info
.........\..\eclock.tan.qmsg
.........\..\eclock.tis_db_list.ddb
.........\..\eclock.tmw_info
.........\..\logic_util_heursitic.dat
.........\..\prev_cmp_eclock.asm.qmsg
.........\..\prev_cmp_eclock.fit.qmsg
.........\..\prev_cmp_eclock.map.qmsg
.........\..\prev_cmp_eclock.qmsg
.........\..\prev_cmp_eclock.tan.qmsg
.........\decoder.vhd
.........\delay.bsf
.........\delay.vhd
.........\delay.vhd.bak
.........\div.bsf
.........\div.vhd
.........\eclock.asm.rpt
.........\eclock.bdf
.........\eclock.cdf
.........\eclock.done
.........\eclock.dpf
.........\eclock.fit.rpt
.........\eclock.fit.smsg
.........\eclock.fit.summary
.........\eclock.flow.rpt
.........\eclock.map.rpt
.........\eclock.map.summary
.........\eclock.pin
.........\eclock.pof
.........\eclock.qpf
.........\eclock.qsf
.........\eclock.qws
.........\eclock.sof
.........\eclock.tan.rpt
.........\eclock.tan.summary
.........\hour.vhd
.........\hour.vhd.bak
.........\incremental_db
.........\..............\compiled_partitions
.........\..............\...................\eclock.root_partition.cmp.cdb
.........\..............\...................\eclock.root_partition.cmp.dfp
.........\..............\...................\eclock.root_partition.cmp.hdb
.........\..............\...................\eclock.root_partition.cmp.kpt
.........\..............\...................\eclock.root_partition.cmp.rcfdb
    

CodeBus www.codebus.net