- Category:
- Other systems
- Tags:
-
- File Size:
- 3kb
- Update:
- 2012-11-26
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- 0 Times
- Uploaded by:
- mrmageR
Description: -- Description : This core implements a SPI master interface.
-- Transfer size is 4, 8, 12 or 16 bits.
-- The SPI clock is 0 when idle, sampled on
-- the rising edge of the SPI clock.
-- The SPI clock is derived from the bus clock input
-- divided by 2, 4, 8 or 16.
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spimaster.vhd