Title:
Simply-RISC-S1-Source-code
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Description: The open-source extensible processor architecture, used to query the source code, very good, it is worth to download
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Simply RISC S1 Source code
..........................\Simply RISC S1 Source code
..........................\..........................\OpenSPARC S1 code-NOTE.txt
..........................\..........................\s1_amba
..........................\..........................\.......\hdl
..........................\..........................\.......\...\behav
..........................\..........................\.......\...\.....\testbench
..........................\..........................\.......\...\.....\.........\mem_harness.v
..........................\..........................\.......\...\.....\.........\s1_defs.h
..........................\..........................\.......\...\.....\.........\testbench.v
..........................\..........................\.......\...\rtl
..........................\..........................\.......\...\...\s1_top
..........................\..........................\.......\...\...\......\s1_defs.h
..........................\..........................\.......\...\...\......\s1_top.v
..........................\..........................\.......\...\...\......\spc2ahb.v
..........................\..........................\s1_core
..........................\..........................\.......\docs
..........................\..........................\.......\....\INSTALL.txt
..........................\..........................\.......\....\LICENSE.txt
..........................\..........................\.......\....\other
..........................\..........................\.......\....\.....\ACCESSES.txt
..........................\..........................\.......\....\.....\BLOCKS.txt
..........................\..........................\.......\....\README.txt
..........................\..........................\.......\....\REQUIREMENTS.txt
..........................\..........................\.......\....\SIMULATION.txt
..........................\..........................\.......\....\SPEC.txt
..........................\..........................\.......\....\SUPPORT.txt
..........................\..........................\.......\....\SYNTHESIS.txt
..........................\..........................\.......\....\TODO.txt
..........................\..........................\.......\....\UPDATING.txt
..........................\..........................\.......\hdl
..........................\..........................\.......\...\behav
..........................\..........................\.......\...\.....\sparc_libs
..........................\..........................\.......\...\.....\..........\m1_lib.v
..........................\..........................\.......\...\.....\..........\u1_lib.v
..........................\..........................\.......\...\.....\testbench
..........................\..........................\.......\...\.....\.........\mem_harness.v
..........................\..........................\.......\...\.....\.........\s1_defs.h
..........................\..........................\.......\...\.....\.........\testbench.v
..........................\..........................\.......\...\filelist.dc
..........................\..........................\.......\...\filelist.fpga
..........................\..........................\.......\...\filelist.icarus
..........................\..........................\.......\...\filelist.vcs
..........................\..........................\.......\...\filelist.xst
..........................\..........................\.......\...\macrocell
..........................\..........................\.......\...\.........\sparc_libs
..........................\..........................\.......\...\rtl
..........................\..........................\.......\...\...\s1_top
..........................\..........................\.......\...\...\......\int_ctrl.v
..........................\..........................\.......\...\...\......\rst_ctrl.v
..........................\..........................\.......\...\...\......\s1_defs.h
..........................\..........................\...
