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Downloads SourceCode Embeded-SCM Develop VHDL-FPGA-Verilog
Title: verilog Download
 Description: An example Verilog project. 7-segment
 Downloaders recently: [More information of uploader sjtu515]
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File list (Check if you may need any files): 
clock_div.v
core.v
seven_seg_decoder.v
sw_top.v
sw_top_tb.v

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