Description: ask, psk, qpsk debugging demodulator verilog source, is a wireless communications fpga design of this book, a relatively simple way to achieve
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ask_2.v
ask_2_de.v
fsk_2.v
fsk_2_de.v
psk_2.v
psk_2_de.v
qpsk.v
qpsk_de.v
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