- Category:
- VHDL-FPGA-Verilog
- Tags:
-
- File Size:
- 337kb
- Update:
- 2012-11-26
- Downloads:
- 0 Times
- Uploaded by:
- 小寒
Description: VHDL simple digital electronic clock program (ONLY a process). NO the time setting, alarm clock function.
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File list (Check if you may need any files):
elec_clock_if\db\led_time.analyze_file.qmsg
.............\..\led_time.asm.qmsg
.............\..\led_time.asm_labs.ddb
.............\..\led_time.cbx.xml
.............\..\led_time.cmp.bpm
.............\..\led_time.cmp.cdb
.............\..\led_time.cmp.ecobp
.............\..\led_time.cmp.hdb
.............\..\led_time.cmp.logdb
.............\..\led_time.cmp.rdb
.............\..\led_time.cmp.tdb
.............\..\led_time.cmp0.ddb
.............\..\led_time.cmp2.ddb
.............\..\led_time.db_info
.............\..\led_time.eco.cdb
.............\..\led_time.fit.qmsg
.............\..\led_time.hier_info
.............\..\led_time.hif
.............\..\led_time.map.bpm
.............\..\led_time.map.cdb
.............\..\led_time.map.ecobp
.............\..\led_time.map.hdb
.............\..\led_time.map.logdb
.............\..\led_time.map.qmsg
.............\..\led_time.map_bb.cdb
.............\..\led_time.map_bb.hdb
.............\..\led_time.map_bb.hdbx
.............\..\led_time.map_bb.logdb
.............\..\led_time.pre_map.cdb
.............\..\led_time.pre_map.hdb
.............\..\led_time.psp
.............\..\led_time.root_partition.cmp.atm
.............\..\led_time.root_partition.cmp.dfp
.............\..\led_time.root_partition.cmp.hdbx
.............\..\led_time.root_partition.cmp.logdb
.............\..\led_time.root_partition.cmp.rcf
.............\..\led_time.root_partition.map.atm
.............\..\led_time.root_partition.map.hdbx
.............\..\led_time.root_partition.map.info
.............\..\led_time.rtlv.hdb
.............\..\led_time.rtlv_sg.cdb
.............\..\led_time.rtlv_sg_swap.cdb
.............\..\led_time.sgdiff.cdb
.............\..\led_time.sgdiff.hdb
.............\..\led_time.signalprobe.cdb
.............\..\led_time.sld_design_entry.sci
.............\..\led_time.sld_design_entry_dsc.sci
.............\..\led_time.syn_hier_info
.............\..\led_time.tan.qmsg
.............\..\led_time.tis_db_list.ddb
.............\..\led_time.tmw_info
.............\..\prev_cmp_led_time.asm.qmsg
.............\..\prev_cmp_led_time.fit.qmsg
.............\..\prev_cmp_led_time.map.qmsg
.............\..\prev_cmp_led_time.qmsg
.............\..\prev_cmp_led_time.tan.qmsg
.............\led_time.asm.rpt
.............\led_time.done
.............\led_time.dpf
.............\led_time.fit.rpt
.............\led_time.fit.smsg
.............\led_time.fit.summary
.............\led_time.flow.rpt
.............\led_time.map.rpt
.............\led_time.map.summary
.............\led_time.pin
.............\led_time.pof
.............\led_time.qpf
.............\led_time.qsf
.............\led_time.qws
.............\led_time.sof
.............\led_time.tan.rpt
.............\led_time.tan.summary
.............\led_time.vhd
.............\led_time.vhd.bak
.............\db
elec_clock_if