- Category:
- VHDL-FPGA-Verilog
- Tags:
-
- File Size:
- 1kb
- Update:
- 2012-11-26
- Downloads:
- 0 Times
- Uploaded by:
- 赵永峰
Description: 16-bit counter, enable function, you can add and subtract counting, asynchronous clear bits without a finite state machine
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counter16.vhd
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