Description: This manual applies to the use the NANO-LOGIC CPLD series development board user. A higher-end FPGA development board can do both project development can also be coupled with a common basis for device interface board as a new training started to use the product launch aimed at expansion of infrastructure and user-friendly for beginners to learn to use. To facilitate debugging and display program work state in the early debugging FPGA design often use a lot of debug interface devices such as lights, buttons, LCD these devices not only a waste of limited FPGA resources and waste valuable board volume. The development board provides the usual user debugger need basic input and output, and PC communication interface, only six user IO, and expansion of the user base is equivalent to more than 40 IO devices. User base device can be used in parallel without disturbing each other. This development board can be used by the Company with the use of FPGA products, at the same time, the developmen
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nano-logic用户手册
..................\FPGA开发板与nano-logic通信IP core使用说明.doc
..................\NANO-LOGIC用户手册.pdf
..................\红色飓风nano-logic管脚列表.xls
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