- Category:
- VHDL-FPGA-Verilog
- Tags:
-
- File Size:
- 2kb
- Update:
- 2013-02-28
- Downloads:
- 0 Times
- Uploaded by:
- 郭俊杰
Description: Verilog code for UART module has been tested, it is able to achieve normal receive and transmit functions.
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File list (Check if you may need any files):
uart_rx
uart_tx