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Title: DS6__LCD_VHDDe Download
 Description: 16x2 LCD display out using vhdl language development the module the drive drivver program source. Compiled in quartus can be run directly can be used directly.
 Downloaders recently: [More information of uploader wangjiantin]
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DS6__LCD_VHDDe\S6_LCD_VHDL\Doc\程序说明.txt
..............\...........\Proj\cmp_state.ini
..............\...........\....\db\cntr_ea7.tdf
..............\...........\....\..\cntr_ed8.tdf
..............\...........\....\..\cntr_hd8.tdf
..............\...........\....\..\Proj.asm.qmsg
..............\...........\....\..\Proj.asm_labs.ddb
..............\...........\....\..\Proj.cbx.xml
..............\...........\....\..\Proj.cmp.cdb
..............\...........\....\..\Proj.cmp.hdb
..............\...........\....\..\Proj.cmp.logdb
..............\...........\....\..\Proj.cmp.rdb
..............\...........\....\..\Proj.cmp.tdb
..............\...........\....\..\Proj.cmp0.ddb
..............\...........\....\..\Proj.cmp2.ddb
..............\...........\....\..\Proj.db_info
..............\...........\....\..\Proj.eco.cdb
..............\...........\....\..\Proj.fit.qmsg
..............\...........\....\..\Proj.hier_info
..............\...........\....\..\Proj.hif
..............\...........\....\..\Proj.map.cdb
..............\...........\....\..\Proj.map.hdb
..............\...........\....\..\Proj.map.logdb
..............\...........\....\..\Proj.map.qmsg
..............\...........\....\..\Proj.pre_map.cdb
..............\...........\....\..\Proj.pre_map.hdb
..............\...........\....\..\Proj.psp
..............\...........\....\..\Proj.rtlv.hdb
..............\...........\....\..\Proj.rtlv_sg.cdb
..............\...........\....\..\Proj.rtlv_sg_swap.cdb
..............\...........\....\..\Proj.sgdiff.cdb
..............\...........\....\..\Proj.sgdiff.hdb
..............\...........\....\..\Proj.signalprobe.cdb
..............\...........\....\..\Proj.sld_design_entry.sci
..............\...........\....\..\Proj.sld_design_entry_dsc.sci
..............\...........\....\..\Proj.syn_hier_info
..............\...........\....\..\Proj.tan.qmsg
..............\...........\....\..\Proj_cmp.qrpt
..............\...........\....\div16.bsf
..............\...........\....\lcd.bsf
..............\...........\....\LCD_test.bdf
..............\...........\....\lcd_test.bsf
..............\...........\....\LCD_Test.qpf
..............\...........\....\LCD_Test.qws
..............\...........\....\Proj.asm.rpt
..............\...........\....\Proj.cdf
..............\...........\....\Proj.done
..............\...........\....\Proj.fit.eqn
..............\...........\....\Proj.fit.rpt
..............\...........\....\Proj.fit.summary
..............\...........\....\Proj.flow.rpt
..............\...........\....\Proj.map.eqn
..............\...........\....\Proj.map.rpt
..............\...........\....\Proj.map.summary
..............\...........\....\Proj.pin
..............\...........\....\Proj.pof
..............\...........\....\Proj.qsf
..............\...........\....\Proj.sof
..............\...........\....\Proj.tan.rpt
..............\...........\....\Proj.tan.summary
..............\...........\....\Proj_assignment_defaults.qdf
..............\...........\....\Proj_description.txt
..............\...........\Src\char_ram.vhd
..............\...........\...\DIV16.v
..............\...........\...\lcd.vhd
..............\...........\Proj\db
..............\...........\Doc
..............\...........\Proj
..............\...........\Src
..............\S6_LCD_VHDL
DS6__LCD_VHDDe
    

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