深入浅出玩转FPGA——光盘资料\BJ-EPM240V2原理图.pdf
............................\SF-EP1V2 FPGA开发板原理图.pdf
............................\光盘说明.txt
............................\项目应用\ex15_logic_analysis\logic_analysis\char_rom.bsf
............................\........\...................\..............\char_rom.qip
............................\........\...................\..............\char_rom.v
............................\........\...................\..............\char_rom_bb.v
............................\........\...................\..............\char_rom_data.mif
............................\........\...................\..............\char_rom_data.rar
............................\........\...................\..............\char_rom_inst.v
............................\........\...................\..............\char_rom_wave0.jpg
............................\........\...................\..............\char_rom_waveforms.html
............................\........\...................\..............\Ch_rom.qip
............................\........\...................\..............\db\altsyncram_0e71.tdf
............................\........\...................\..............\..\altsyncram_5m31.tdf
............................\........\...................\..............\..\altsyncram_dg61.tdf
............................\........\...................\..............\..\altsyncram_fc61.tdf
............................\........\...................\..............\..\altsyncram_hd51.tdf
............................\........\...................\..............\..\altsyncram_lp51.tdf
............................\........\...................\..............\..\altsyncram_n0a1.tdf
............................\........\...................\..............\..\altsyncram_op51.tdf
............................\........\...................\..............\..\altsyncram_ql51.tdf
............................\........\...................\..............\..\altsyncram_u0a1.tdf
............................\........\...................\..............\..\cntr_0df.tdf
............................\........\...................\..............\..\logic_analysis.asm.qmsg
............................\........\...................\..............\..\logic_analysis.cbx.xml
............................\........\...................\..............\..\logic_analysis.cmp.bpm
............................\........\...................\..............\..\logic_analysis.cmp.cdb
............................\........\...................\..............\..\logic_analysis.cmp.ecobp
............................\........\...................\..............\..\logic_analysis.cmp.hdb
............................\........\...................\..............\..\logic_analysis.cmp.kpt
............................\........\...................\..............\..\logic_analysis.cmp.logdb
............................\........\...................\..............\..\logic_analysis.cmp.rdb
............................\........\...................\..............\..\logic_analysis.cmp0.ddb
............................\........\...................\..............\..\logic_analysis.cmp_merge.kpt
............................\........\...................\..............\..\logic_analysis.db_info
............................\........\...................\..............\..\logic_analysis.eco.cdb
............................\........\...................\..............\..\logic_analysis.eda.qmsg
............................\........\...................\..............\..\logic_analysis.fit.qmsg
............................\........\...................\..............\..\logic_analysis.hier_info
............................\........\...................\..............\..\logic_analysis.hif
............................\........\...................\..............\..\logic_analysis.lpc.html
............................\........\...................\..............\..\logic_analysis.lpc.rdb
............................\........\...................\..............\..\logic_analysis.lpc.txt
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