- Category:
- SCM
- Tags:
-
[VHDL]
[源码]
- File Size:
- 16kb
- Update:
- 2012-11-26
- Downloads:
- 0 Times
- Uploaded by:
- 麦飞
Description: In this instance, the development board communication through the serial port on a PC running PC software, use the timer T0 as a baud rate generator, serial port baud rate to 9600.
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File list (Check if you may need any files):
05-串口接收\clock.bsf
...........\clock.v
...........\counter_core.v
...........\db\prev_cmp_uart_rx.qmsg
...........\..\uart_rx.cbx.xml
...........\..\uart_rx.db_info
...........\..\uart_rx.eco.cdb
...........\..\uart_rx.sld_design_entry.sci
...........\..\uart_rx.sld_design_entry_dsc.sci
...........\db
...........\incremental_db\compiled_partitions
...........\..............\README
...........\incremental_db
...........\shifter.v
...........\timer.v
...........\uart_rx.bsf
...........\uart_rx.done
...........\uart_rx.qpf
...........\uart_rx.qsf
...........\uart_rx.qws
...........\uart_rx.v
...........\uart_rx_test.bsf
...........\uart_rx_test.v
...........\uart_rx_top.bdf
...........\uart_rx_top.v
05-串口接收
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