- Category:
- Other systems
- Tags:
-
- File Size:
- 273kb
- Update:
- 2012-11-26
- Downloads:
- 0 Times
- Uploaded by:
- 闭梁祖
Description: Digital electronic clock vhdl write, to set the alarm clock, designated chime tune, written using Quartus II 7.2 (32-Bit), compressed files, source code and simulation files inside (that is, the construction works)
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File list (Check if you may need any files):
clock\clock.asm.rpt
.....\clock.done
.....\clock.fit.rpt
.....\clock.fit.summary
.....\clock.flow.rpt
.....\clock.map.rpt
.....\clock.map.summary
.....\clock.pin
.....\clock.pof
.....\clock.qpf
.....\clock.qsf
.....\clock.qws
.....\clock.sim.rpt
.....\clock.sof
.....\clock.tan.rpt
.....\clock.tan.summary
.....\clock.vhd
.....\clock.vhd.bak
.....\clock.vwf
.....\db\add_sub_0ih.tdf
.....\..\clock.asm.qmsg
.....\..\clock.cbx.xml
.....\..\clock.cmp.cdb
.....\..\clock.cmp.hdb
.....\..\clock.cmp.logdb
.....\..\clock.cmp.rdb
.....\..\clock.cmp.tdb
.....\..\clock.cmp0.ddb
.....\..\clock.dbp
.....\..\clock.db_info
.....\..\clock.eco.cdb
.....\..\clock.eds_overflow
.....\..\clock.fit.qmsg
.....\..\clock.hier_info
.....\..\clock.hif
.....\..\clock.map.cdb
.....\..\clock.map.hdb
.....\..\clock.map.logdb
.....\..\clock.map.qmsg
.....\..\clock.pre_map.cdb
.....\..\clock.pre_map.hdb
.....\..\clock.psp
.....\..\clock.pss
.....\..\clock.rtlv.hdb
.....\..\clock.rtlv_sg.cdb
.....\..\clock.rtlv_sg_swap.cdb
.....\..\clock.sgdiff.cdb
.....\..\clock.sgdiff.hdb
.....\..\clock.sim.cvwf
.....\..\clock.sim.hdb
.....\..\clock.sim.qmsg
.....\..\clock.sim.rdb
.....\..\clock.sld_design_entry.sci
.....\..\clock.sld_design_entry_dsc.sci
.....\..\clock.syn_hier_info
.....\..\clock.tan.qmsg
.....\..\clock.tis_db_list.ddb
.....\..\prev_cmp_clock.asm.qmsg
.....\..\prev_cmp_clock.fit.qmsg
.....\..\prev_cmp_clock.map.qmsg
.....\..\prev_cmp_clock.qmsg
.....\..\prev_cmp_clock.sim.qmsg
.....\..\prev_cmp_clock.tan.qmsg
.....\..\wed.wsf
.....\db
clock
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