Welcome![Sign In][Sign Up]
Location:
Downloads SourceCode Embeded-SCM Develop VHDL-FPGA-Verilog
Title: 2 Download
 Description: (1) design a ' when' , ' points' , ' s' decimal digital display (hour timer from 00 to 23). (2) having a manual correction, the correction sub functions. (3) The alarm clock function, can send reminders at a set time (green LED flashes). (4) The whole point timekeeping. Starting at 59 minutes and 50 seconds, every 2 seconds the green LED lights flash five times in a row, when the whole point of the red LED lights flash once.
 Downloaders recently: [More information of uploader 张三]
 To Search:
File list (Check if you may need any files):
 

2.txt
    

CodeBus www.codebus.net