Description: The source mainly realizes the function of phase-locked loop, phase-locked loop consists of input, phase discriminator, loop filter and the voltage-controlled oscillator, as well as the feedback signal, our purpose is to realize the input signal and synchronization of feedback signal, therefore, describes how the source code for tracking the signals are analyzed, capture and lock, finally make its input/output
synchronization.
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File list (Check if you may need any files):
test_pll\Block1.bdf
........\db\logic_util_heursitic.dat
........\..\prev_cmp_test_pll.fit.qmsg
........\..\prev_cmp_test_pll.map.qmsg
........\..\prev_cmp_test_pll.qmsg
........\..\test_pll.cbx.xml
........\..\test_pll.cmp.rdb
........\..\test_pll.db_info
........\..\test_pll.eco.cdb
........\..\test_pll.hier_info
........\..\test_pll.hif
........\..\test_pll.lpc.html
........\..\test_pll.lpc.rdb
........\..\test_pll.lpc.txt
........\..\test_pll.map.ecobp
........\..\test_pll.map.kpt
........\..\test_pll.map.qmsg
........\..\test_pll.map_bb.hdb
........\..\test_pll.pre_map.cdb
........\..\test_pll.pre_map.hdb
........\..\test_pll.rtlv.hdb
........\..\test_pll.rtlv_sg.cdb
........\..\test_pll.rtlv_sg_swap.cdb
........\..\test_pll.sgdiff.cdb
........\..\test_pll.sgdiff.hdb
........\..\test_pll.sld_design_entry.sci
........\..\test_pll.sld_design_entry_dsc.sci
........\..\test_pll.syn_hier_info
........\..\test_pll.tis_db_list.ddb
........\incremental_db\compiled_partitions\test_pll.root_partition.cmp.cdb
........\..............\...................\test_pll.root_partition.cmp.dfp
........\..............\...................\test_pll.root_partition.cmp.hdb
........\..............\...................\test_pll.root_partition.cmp.kpt
........\..............\...................\test_pll.root_partition.cmp.logdb
........\..............\...................\test_pll.root_partition.cmp.rcfdb
........\..............\...................\test_pll.root_partition.cmp.re.rcfdb
........\..............\...................\test_pll.root_partition.map.atm
........\..............\...................\test_pll.root_partition.map.cdb
........\..............\...................\test_pll.root_partition.map.dpi
........\..............\...................\test_pll.root_partition.map.hdb
........\..............\...................\test_pll.root_partition.map.hdbx
........\..............\...................\test_pll.root_partition.map.kpt
........\..............\...................\test_pll.root_partition.merge_hb.atm
........\..............\README
........\serv_req_info.txt
........\test_pll.asm.rpt
........\test_pll.bdf
........\test_pll.bsf
........\test_pll.done
........\test_pll.dpf
........\test_pll.fit.rpt
........\test_pll.fit.smsg
........\test_pll.fit.summary
........\test_pll.flow.rpt
........\test_pll.map.rpt
........\test_pll.map.summary
........\test_pll.pin
........\test_pll.pof
........\test_pll.ppf
........\test_pll.qip
........\test_pll.qpf
........\test_pll.qsf
........\test_pll.qws
........\test_pll.sof
........\test_pll.v
........\undo_redo.txt
........\incremental_db\compiled_partitions
........\db
........\incremental_db
test_pll
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