Description: Learning FPGA students can see, this code USES the VHDL language written by an odd number of frequency divider, not only can learn QUARTUS software, also can better enhance the digital circuit design.
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File list (Check if you may need any files):
odd_div_ok_通用奇数分频器\db\odd_div.asm.qmsg
.........................\..\odd_div.asm_labs.ddb
.........................\..\odd_div.cbx.xml
.........................\..\odd_div.cmp.cdb
.........................\..\odd_div.cmp.hdb
.........................\..\odd_div.cmp.kpt
.........................\..\odd_div.cmp.logdb
.........................\..\odd_div.cmp.rdb
.........................\..\odd_div.cmp.tdb
.........................\..\odd_div.cmp0.ddb
.........................\..\odd_div.dbp
.........................\..\odd_div.db_info
.........................\..\odd_div.eco.cdb
.........................\..\odd_div.eds_overflow
.........................\..\odd_div.fit.qmsg
.........................\..\odd_div.hier_info
.........................\..\odd_div.hif
.........................\..\odd_div.map.cdb
.........................\..\odd_div.map.hdb
.........................\..\odd_div.map.logdb
.........................\..\odd_div.map.qmsg
.........................\..\odd_div.pre_map.cdb
.........................\..\odd_div.pre_map.hdb
.........................\..\odd_div.psp
.........................\..\odd_div.rtlv.hdb
.........................\..\odd_div.rtlv_sg.cdb
.........................\..\odd_div.rtlv_sg_swap.cdb
.........................\..\odd_div.sgdiff.cdb
.........................\..\odd_div.sgdiff.hdb
.........................\..\odd_div.signalprobe.cdb
.........................\..\odd_div.sim.hdb
.........................\..\odd_div.sim.qmsg
.........................\..\odd_div.sim.rdb
.........................\..\odd_div.sim_ori.vwf
.........................\..\odd_div.sld_design_entry.sci
.........................\..\odd_div.sld_design_entry_dsc.sci
.........................\..\odd_div.syn_hier_info
.........................\..\odd_div.tan.qmsg
.........................\..\wed.zsf
.........................\odd_div.asm.rpt
.........................\odd_div.done
.........................\odd_div.fit.rpt
.........................\odd_div.fit.smsg
.........................\odd_div.fit.summary
.........................\odd_div.flow.rpt
.........................\odd_div.IAB
.........................\odd_div.IAD
.........................\odd_div.IMB
.........................\odd_div.IMD
.........................\odd_div.map.rpt
.........................\odd_div.map.summary
.........................\odd_div.PFI
.........................\odd_div.pin
.........................\odd_div.PO
.........................\odd_div.pof
.........................\odd_div.PR
.........................\odd_div.PRI
.........................\odd_div.PS
.........................\odd_div.qpf
.........................\odd_div.qsf
.........................\odd_div.qws
.........................\odd_div.sim.rpt
.........................\odd_div.tan.rpt
.........................\odd_div.tan.summary
.........................\odd_div.vhd
.........................\odd_div.vwf
.........................\odd_div.WK3
.........................\odd_div_signal.vhd
.........................\odd_div_variable.vhd
.........................\odd_div程序逐行解释.doc
.........................\图\integer_limit_range.bmp
.........................\..\integer_range_after.bmp
.........................\..\integer_range_before.bmp
.........................\..\pre_synthesis_value_cnt1.bmp
.........................\..\process_signal_to_variable.bmp
.........................\..\process_value_change.bmp
.........................\..\process_value_change_问题1.bmp
.........................\..\变成variable后所需要的逻辑资源.bmp
.........................\db
.........................\图
odd_div_ok_通用奇数分频器
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