Description: Using Altera fpga cyclone III series EP3C16 MT9D001 the camera driver, and can be displayed in real time on a VGA monitor. Using quartus 10.0 open, be careful not to use the Chinese path.
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File list (Check if you may need any files):
CD1_MT9M111_DISPALY
...................\FPGA
...................\....\CD1_MT9M111_DISPALY.asm.rpt
...................\....\CD1_MT9M111_DISPALY.cdf
...................\....\CD1_MT9M111_DISPALY.done
...................\....\CD1_MT9M111_DISPALY.dpf
...................\....\CD1_MT9M111_DISPALY.fit.rpt
...................\....\CD1_MT9M111_DISPALY.fit.smsg
...................\....\CD1_MT9M111_DISPALY.fit.summary
...................\....\CD1_MT9M111_DISPALY.flow.rpt
...................\....\CD1_MT9M111_DISPALY.map.rpt
...................\....\CD1_MT9M111_DISPALY.map.smsg
...................\....\CD1_MT9M111_DISPALY.map.summary
...................\....\CD1_MT9M111_DISPALY.pin
...................\....\CD1_MT9M111_DISPALY.qpf
...................\....\CD1_MT9M111_DISPALY.qsf
...................\....\CD1_MT9M111_DISPALY.qsf.bak
...................\....\CD1_MT9M111_DISPALY.sof
...................\....\CD1_MT9M111_DISPALY.sta.rpt
...................\....\CD1_MT9M111_DISPALY.sta.summary
...................\....\MY_CODE
...................\....\.......\CD1_MT9M111_DISPALY.v
...................\....\.......\CD1_MT9M111_DISPALY.v.bak
...................\....\.......\CMOS_Capture.v
...................\....\.......\Curve_Averaging.v
...................\....\.......\Curve_Averaging.v.bak
...................\....\.......\GAMA_CORR.qip
...................\....\.......\GAMA_CORR.v
...................\....\.......\I2C_CMOS_Config.v
...................\....\.......\I2C_CMOS_Config.v.bak
...................\....\.......\I2C_Controller.v
...................\....\.......\MAC_3.v
...................\....\.......\RAW2RGB.v
...................\....\.......\Reset_Delay.v
...................\....\.......\Sdram_Control_4Port
...................\....\.......\...................\Sdram_Control_4Port.v
...................\....\.......\...................\Sdram_Control_4Port.v.bak
...................\....\.......\...................\Sdram_FIFO.qip
...................\....\.......\...................\Sdram_FIFO.v
...................\....\.......\...................\Sdram_PLL.ppf
...................\....\.......\...................\Sdram_PLL.qip
...................\....\.......\...................\Sdram_PLL.v
...................\....\.......\...................\Sdram_Params.h
...................\....\.......\...................\command.v
...................\....\.......\...................\command.v.bak
...................\....\.......\...................\control_interface.v
...................\....\.......\...................\control_interface.v.bak
...................\....\.......\...................\sdr_data_path.v
...................\....\.......\...................\sdr_data_path.v.bak
...................\....\.......\VGA_Controller.v
...................\....\.......\VGA_Param.h
...................\....\.......\YCbCr2RGB.v
...................\....\.......\YUV422_to_444.v
...................\....\.......\YUV8to16Bit.v
...................\....\PLLJ_PLLSPE_INFO.txt
...................\....\VGA_PLL.ppf
...................\....\VGA_PLL.qip
...................\....\VGA_PLL.v
...................\NIOS
...................\....\.metadata
...................\....\.........\.lock
...................\....\.........\.log
...................\....\.........\.plugins
...................\....\.........\........\com.altera.nj.ui
...................\....\.........\........\................\dialog_settings.xml
...................\....\.........\........\org.eclipse.cdt.core
...................\....\.........\........\....................\.log
...................\....\.........\........\....................\hello_world_0.1330505671481.pdom
...................\....\.........\........\....................\hello_world_0_syslib.1330505671232.pdom
...................\....\.........\........\....................\hello_world_1.1331368193686.pdom
...................\....\.........\........\....................\hello_world_1_syslib.1331368193524.pdom
...................\....\.........\........\org.eclipse.cdt.make.core
...................\....\.........\........\......................
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