Description: TMS320C54x Chip multi-bus architecture, which allows a single machine cycle through two 16-bit data bus (C bus and D bus) addressing both data and coefficients. Two-operand instructions are obtained using indirect addressing operands, and only use the auxiliary register AR2 to AR5. Two-operand instructions of the program takes up less space, and access to a faster speed.
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Ex3_2
.....\cc_build_Debug.log
.....\Debug
.....\.....\Ex4_2.obj
.....\Debug.lkf
.....\Debug.lkv
.....\Ex4_2.asm
.....\Ex4_2.cmd
.....\Ex4_2.map
.....\Ex4_2.out
.....\Ex4_2.paf
.....\Ex4_2.pjt