Welcome![Sign In][Sign Up]
Location:
Downloads SourceCode Embeded-SCM Develop VHDL-FPGA-Verilog
Title: qdr2_top Download
 Description: xinlinx QDR2 contoller for verilog
 Downloaders recently: [More information of uploader 陈少杰]
 To Search:
File list (Check if you may need any files):
 

qdr2_top\qdr2_top.v
........\..._crc_test\afifo_512x64.v
........\............\afifo_512x66.v
........\............\bk\复件 qdr_crc_gmpi.v
........\............\conv_36_64.v
........\............\conv_64_36.v
........\............\crc32_64b_rx.v
........\............\crc32_64b_tx.v
........\............\crc32_chk.v
........\............\crc32_gen.v
........\............\data_gen_64.v
........\............\qdr_crc_gmpi.v
........\............\qdr_crc_test.v
........\QDR_CRC_TEST设计方案.doc
........\qdr_ctrl\.svn\all-wcprops
........\........\....\entries
........\........\....\text-base\ctrl_gen.v.svn-base
........\........\....\.........\DDIO18B_IN.v.svn-base
........\........\....\.........\DDIO18B_OUT.v.svn-base
........\........\....\.........\DDIO1B_IN.v.svn-base
........\........\....\.........\DDIO1B_OUT.v.svn-base
........\........\....\.........\DDIO20B.v.svn-base
........\........\....\.........\DDIO8B_IN.v.svn-base
........\........\....\.........\DDIO8B_OUT.v.svn-base
........\........\....\.........\DDIO9B_IN.v.svn-base
........\........\....\.........\DDIO9B_OUT.v.svn-base
........\........\....\.........\IDDR.v.svn-base
........\........\....\.........\idelay_tap_ctrl.v.svn-base
........\........\....\.........\ODDR.v.svn-base
........\........\....\.........\qdr2_test.v.svn-base
........\........\....\.........\qdr_ctrl.v.svn-base
........\........\....\.........\qdr_test.v.svn-base
........\........\....\.........\qdr_test_sel.v.svn-base
........\........\....\.........\qdr_top.v.svn-base
........\........\....\.........\rd_data_proc.v.svn-base
........\........\afifo_128x36.v
........\........\afifo_64x78.v
........\........\bk\qdr2_test.v
........\........\ctrl_gen.v
........\........\DDIO18B_IN.v
........\........\DDIO18B_OUT.v
........\........\DDIO1B_IN.v
........\........\DDIO1B_OUT.v
........\........\DDIO20B.v
........\........\DDIO8B_IN.v
........\........\DDIO8B_OUT.v
........\........\DDIO9B_IN.v
........\........\DDIO9B_OUT.v
........\........\IDDR.v
........\........\idelay_tap_ctrl.v
........\........\ODDR.v
........\........\qdr2_test.v
........\........\qdr_ctrl.v
........\........\qdr_ctrl_top.v
........\........\qdr_test.v
........\........\qdr_test_sel.v
........\........\rd_data_proc.v
........\QDR_CTRL模块寄存器.doc
........\qdr_ctrl\.svn\tmp\prop-base
........\........\....\...\props
........\........\....\...\text-base
........\........\....\prop-base
........\........\....\props
........\........\....\text-base
........\........\....\tmp
........\.....rc_test\bk
........\.....trl\.svn
........\........\bk
........\qdr_crc_test
........\qdr_ctrl
qdr2_top
    

CodeBus www.codebus.net