- Category:
- VHDL-FPGA-Verilog
- Tags:
-
- File Size:
- 1kb
- Update:
- 2013-09-11
- Downloads:
- 0 Times
- Uploaded by:
- Tom
Description: A RAM are connected to the USB, the test data transmission, use the start development board has been tested successfully.
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ram_data.vhd