i2c
...\bench
...\.....\CVS
...\.....\...\Entries
...\.....\...\Entries.Extra
...\.....\...\Repository
...\.....\...\Root
...\.....\...\Template
...\.....\verilog
...\.....\.......\CVS
...\.....\.......\...\Entries
...\.....\.......\...\Entries.Extra
...\.....\.......\...\Repository
...\.....\.......\...\Root
...\.....\.......\...\Template
...\.....\.......\i2c_slave_model.v
...\.....\.......\spi_slave_model.v
...\.....\.......\tst_bench_top.v
...\.....\.......\wb_master_model.v
...\CVS
...\...\Entries
...\...\Entries.Extra
...\...\Repository
...\...\Root
...\...\Template
...\doc
...\...\CVS
...\...\...\Entries
...\...\...\Entries.Extra
...\...\...\Repository
...\...\...\Root
...\...\...\Template
...\...\i2c_specs.pdf
...\...\src
...\...\...\CVS
...\...\...\...\Entries
...\...\...\...\Entries.Extra
...\...\...\...\Repository
...\...\...\...\Root
...\...\...\...\Template
...\...\...\I2C_specs.doc
...\rtl
...\...\CVS
...\...\...\Entries
...\...\...\Entries.Extra
...\...\...\Repository
...\...\...\Root
...\...\...\Template
...\...\verilog
...\...\.......\CVS
...\...\.......\...\Entries
...\...\.......\...\Entries.Extra
...\...\.......\...\Repository
...\...\.......\...\Root
...\...\.......\...\Template
...\...\.......\i2c_master_bit_ctrl.v
...\...\.......\i2c_master_byte_ctrl.v
...\...\.......\i2c_master_defines.v
...\...\.......\i2c_master_top.v
...\...\.......\timescale.v
...\...\vhdl
...\...\....\CVS
...\...\....\...\Entries
...\...\....\...\Entries.Extra
...\...\....\...\Repository
...\...\....\...\Root
...\...\....\...\Template
...\...\....\I2C.VHD
...\...\....\i2c_master_bit_ctrl.vhd
...\...\....\i2c_master_byte_ctrl.vhd
...\...\....\i2c_master_top.vhd
...\...\....\readme
...\...\....\tst_ds1621.vhd
...\sim
...\...\CVS
...\...\...\Entries
...\...\...\Entries.Extra
...\...\...\Repository
...\...\...\Root
...\...\...\Template
...\...\i2c_verilog
...\...\...........\CVS
...\...\...........\...\Entries
...\...\...........\...\Entries.Extra
...\...\...........\...\Repository
...\...\...........\...\Root
...\...\...........\...\Template
...\...\...........\run
...\...\...........\...\bench.vcd
...\...\...........\...\CVS
...\...\...........\...\...\Entries
...\...\...........\...\...\Entries.Extra
...\...\...........\...\...\Repository
...\...\...........\...\...\Root
...\...\...........\...\...\Template
...\...\...........\...\ncverilog.key
...\...\...........\...\ncverilog.log
...\...\...........\...\run
...\software
...\........\CVS