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Title: clock_div Download
 Description: divider verilog prepared
 Downloaders recently: [More information of uploader ai]
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clock_div
.........\DOC
.........\...\工程说明文档.txt
.........\...\设计方案说明.docx
.........\RTL
.........\...\clock_div.v
.........\...\clock_div.v.bak
.........\clock_div.asm.rpt
.........\clock_div.done
.........\clock_div.fit.rpt
.........\clock_div.fit.smsg
.........\clock_div.fit.summary
.........\clock_div.flow.rpt
.........\clock_div.jdi
.........\clock_div.map.rpt
.........\clock_div.map.summary
.........\clock_div.pin
.........\clock_div.qpf
.........\clock_div.qsf
.........\clock_div.sof
.........\clock_div.sta.rpt
.........\clock_div.sta.summary
.........\clock_div_stp.stp
.........\db
.........\..\altsyncram_0u14.tdf
.........\..\altsyncram_k124.tdf
.........\..\altsyncram_qt14.tdf
.........\..\altsyncram_st14.tdf
.........\..\altsyncram_ut14.tdf
.........\..\clock_div.amm.cdb
.........\..\clock_div.asm.qmsg
.........\..\clock_div.asm.rdb
.........\..\clock_div.asm_labs.ddb
.........\..\clock_div.cbx.xml
.........\..\clock_div.cmp.bpm
.........\..\clock_div.cmp.cdb
.........\..\clock_div.cmp.hdb
.........\..\clock_div.cmp.kpt
.........\..\clock_div.cmp.logdb
.........\..\clock_div.cmp.rdb
.........\..\clock_div.cmp_merge.kpt
.........\..\clock_div.cycloneive_io_sim_cache.31um_ff_1200mv_0c_fast.hsd
.........\..\clock_div.cycloneive_io_sim_cache.31um_ss_1200mv_0c_slow.hsd
.........\..\clock_div.cycloneive_io_sim_cache.31um_ss_1200mv_85c_slow.hsd
.........\..\clock_div.db_info
.........\..\clock_div.fit.qmsg
.........\..\clock_div.hier_info
.........\..\clock_div.hif
.........\..\clock_div.idb.cdb
.........\..\clock_div.lpc.html
.........\..\clock_div.lpc.rdb
.........\..\clock_div.lpc.txt
.........\..\clock_div.map.bpm
.........\..\clock_div.map.cdb
.........\..\clock_div.map.hdb
.........\..\clock_div.map.kpt
.........\..\clock_div.map.logdb
.........\..\clock_div.map.qmsg
.........\..\clock_div.map_bb.cdb
.........\..\clock_div.map_bb.hdb
.........\..\clock_div.map_bb.logdb
.........\..\clock_div.pre_map.cdb
.........\..\clock_div.pre_map.hdb
.........\..\clock_div.rtlv.hdb
.........\..\clock_div.rtlv_sg.cdb
.........\..\clock_div.rtlv_sg_swap.cdb
.........\..\clock_div.sgdiff.cdb
.........\..\clock_div.sgdiff.hdb
.........\..\clock_div.sld_design_entry.sci
.........\..\clock_div.sld_design_entry_dsc.sci
.........\..\clock_div.smart_action.txt
.........\..\clock_div.sta.qmsg
.........\..\clock_div.sta.rdb
.........\..\clock_div.sta_cmp.8_slow_1200mv_85c.tdb
.........\..\clock_div.stingray_io_sim_cache.99um_ff_1200mv_0c_fast.hsd
.........\..\clock_div.stingray_io_sim_cache.99um_tt_1200mv_0c_slow.hsd
.........\..\clock_div.stingray_io_sim_cache.99um_tt_1200mv_85c_slow.hsd
.........\..\clock_div.syn_hier_info
.........\..\clock_div.tis_db_list.ddb
.........\..\clock_div.tiscmp.fast_1200mv_0c.ddb
.........\..\clock_div.tiscmp.fastest_slow_1200mv_0c.ddb
.........\..\clock_div.tiscmp.fastest_slow_1200mv_85c.ddb
.........\..\clock_div.tiscmp.slow_1200mv_0c.ddb
.........\..\clock_div.tiscmp.slow_1200mv_85c.ddb
.........\..\cmpr_ngc.tdf
.........\..\cmpr_ogc.tdf
.........\..\cmpr_rgc.tdf
.........\..\cmpr_tgc.tdf
.........\..\cntr_23j.tdf
.........\..\cntr_ggi.tdf
.........\..\cntr_m9j.tdf
.........\..\cntr_pei.tdf
.........\..\cntr_pgi.tdf
.........\..\cntr_qei.tdf
.........\..\decode_dvf.tdf
.........\..\logic_util_heursitic.dat
.........\..\mux_tsc.tdf
.........\..\prev_cmp_clock_div.qmsg
.........\incremental_db
.........\..............\README
    

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