Description: Containing the Verilog common basic components, allows novice handy with fast appreciate Verilog, positive thinking.
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新建文件夹
..........\ram.v
..........\verilog基础部件库
..........\.................\johnson.v
..........\.................\latch_1.v
..........\.................\latch_2.v
..........\.................\latch_8.v
..........\.................\mac.v
..........\.................\mac_tp.v
..........\.................\map_lpm_ram.v
..........\.................\mpc.v
..........\.................\mpc_tp.v
..........\.................\mux_case.v
..........\.................\mux_if.v
..........\.................\parity.v
..........\.................\ram256x8.v
..........\.................\reg8.v
..........\.................\rom.v
..........\.................\serial_pal.v
..........\.................\shifter.v
..........\.................\tri_1.v
..........\.................\tri_2.v
..........\.................\updown_count.v
..........\verilog数据转换.wps
..........\用Verilog_HDL设计计数器.docx
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