ddr2\DDR2ConTroller\ddr2controller.bgn
....\..............\ddr2controller.bit
....\..............\DDR2ConTroller.bld
....\..............\DDR2ConTroller.cmd_log
....\..............\ddr2controller.drc
....\..............\DDR2ConTroller.gise
....\..............\DDR2ConTroller.lso
....\..............\DDR2ConTroller.ncd
....\..............\DDR2ConTroller.ngc
....\..............\DDR2ConTroller.ngd
....\..............\DDR2ConTroller.ngr
....\..............\DDR2ConTroller.pad
....\..............\DDR2ConTroller.par
....\..............\DDR2ConTroller.pcf
....\..............\DDR2ConTroller.prj
....\..............\DDR2ConTroller.ptwx
....\..............\DDR2ConTroller.stx
....\..............\DDR2ConTroller.syr
....\..............\DDR2ConTroller.twr
....\..............\DDR2ConTroller.twx
....\..............\DDR2ConTroller.ucf
....\..............\DDR2ConTroller.unroutes
....\..............\DDR2ConTroller.ut
....\..............\DDR2ConTroller.v
....\..............\DDR2ConTroller.xise
....\..............\DDR2ConTroller.xpi
....\..............\DDR2ConTroller.xst
....\..............\DDR2ConTroller_addr_gen_0.v
....\..............\DDR2ConTroller_bitgen.xwbt
....\..............\DDR2ConTroller_cal_ctl.v
....\..............\DDR2ConTroller_cal_top.v
....\..............\DDR2ConTroller_clk_dcm.v
....\..............\DDR2ConTroller_cmd_fsm_0.v
....\..............\DDR2ConTroller_cmp_data_0.v
....\..............\DDR2ConTroller_controller_0.v
....\..............\DDR2ConTroller_controller_iobs_0.v
....\..............\DDR2ConTroller_cs.blc
....\..............\DDR2ConTroller_cs.ngc
....\..............\DDR2ConTroller_data_gen_0.v
....\..............\DDR2ConTroller_data_path_0.v
....\..............\DDR2ConTroller_data_path_iobs_0.v
....\..............\DDR2ConTroller_data_read_0.v
....\..............\DDR2ConTroller_data_read_controller_0.v
....\..............\DDR2ConTroller_data_write_0.v
....\..............\DDR2ConTroller_dqs_delay.v
....\..............\DDR2ConTroller_envsettings.html
....\..............\DDR2ConTroller_fifo_0_wr_en_0.v
....\..............\DDR2ConTroller_fifo_1_wr_en_0.v
....\..............\DDR2ConTroller_guide.ncd
....\..............\DDR2ConTroller_infrastructure.v
....\..............\DDR2ConTroller_infrastructure_iobs_0.v
....\..............\DDR2ConTroller_infrastructure_top.v
....\..............\DDR2ConTroller_iobs_0.v
....\..............\DDR2ConTroller_main_0.v
....\..............\DDR2ConTroller_map.map
....\..............\DDR2ConTroller_map.mrp
....\..............\DDR2ConTroller_map.ncd
....\..............\DDR2ConTroller_map.ngm
....\..............\DDR2ConTroller_map.xrpt
....\..............\DDR2ConTroller_ngdbuild.xrpt
....\..............\DDR2ConTroller_pad.csv
....\..............\DDR2ConTroller_pad.txt
....\..............\DDR2ConTroller_par.xrpt
....\..............\DDR2ConTroller_parameters_0.v
....\..............\DDR2ConTroller_ram8d_0.v
....\..............\DDR2ConTroller_rd_gray_cntr.v
....\..............\DDR2ConTroller_s3_dm_iob.v
....\..............\DDR2ConTroller_s3_dqs_iob.v
....\..............\DDR2ConTroller_s3_dq_iob.v
....\..............\DDR2ConTroller_summary.html
....\..............\DDR2ConTroller_summary.xml
....\..............\DDR2ConTroller_tap_dly.v
....\..............\DDR2ConTroller_test_bench_0.v
....\..............\DDR2ConTroller_top_0.v
....\..............\DDR2ConTroller_usage.xml
....\..............\DDR2ConTroller_wr_gray_cntr.v
....\..............\DDR2ConTroller_xst.xrpt
....\..............\ipcore_dir\coregen.cgp
....\..............\..........\coregen.log
....\..............\..........\create_DDR2ConTroller.tcl
....\..............\..........\DDR2ConTroller\docs\768c.pdf
....\..............\..........\..............\....\adr_cntrl_timing_0.xls
....\..............\..........\..............\....\read_data_timing_0.xls
....\..............\..........\..............\....\ug086.pdf
....\..............\..........\..............\....\write_data_timing_0.xls
....\..............\..........\..............\example_design\datasheet.txt
....\..............\..........\..............\..............\log.txt
....\.............