Description: The summary of several low-power design method of the the VLIW password microprocessor. According to the mechanism of the energy consumption of the CMOS circuit, the the VLIW password microprocessor power analysis. For the results of the analysis, the use of clock gating, instruction prefix compression, memory sub block access and operand isolation low power technology, to optimize the the VLIW password microprocessor power consumption. Based on SMIC the 65nm process libraries and power analysis tools PTPX power analysis, experimental results show that low-power method used in this paper can effectively reduce the power consumption of VLIW password microprocessor.
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密码微处理器低功耗设计.doc
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