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Title: CLKCP01 Download
  • Category:
  • VHDL-FPGA-Verilog
  • Tags:
  • File Size:
  • 1.59kb
  • Update:
  • 2008-10-13
  • Downloads:
  • 0 Times
  • Uploaded by:
  • lldke
 Description: LCD 320* 240 pulse realized there every 12 clk byte out a pulse, with each 40-byte burst out a pulse line. 240 firms from the end of a frame pulse.
 Downloaders recently: [More information of uploader lldke]
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