Description: Translate BLIF（Berkeley Logic Interchange Format）circuit to VHDL description, the translator need perl environment to run. Please check you have related tools.
Also include a offical document about BLIF explanation.
To Search:
File list (Check if you may need any files):
blif2vhdl-v1.1\blif.pdf
..............\blif2vhd.pl
..............\COPYRIGHT.txt
..............\README.txt
blif2vhdl-v1.1
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