- Category:
- source in ebook
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-
- File Size:
- 14kb
- Update:
- 2014-05-08
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- 0 Times
- Uploaded by:
- 赵慕祺
Description: Synchronous FIFO design source code, synchronous FIFO design with a reset signal, can write and read data in the same clock domain range, so do efficacy data transfer.
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同步FIFO设计源代码.docx
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