steppulse
.........\clock_generator.v
.........\edkBmmFile.bmm
.........\EXC.prj
.........\EXC.stx
.........\EXC.v
.........\EXC.xst
.........\ipcore_dir
.........\..........\blk_mem
.........\..........\.......\blk_mem_gen_v7_3_readme.txt
.........\..........\.......\doc
.........\..........\.......\...\blk_mem_gen_v7_3_vinfo.html
.........\..........\.......\...\pg058-blk-mem-gen.pdf
.........\..........\.......\example_design
.........\..........\.......\..............\blk_mem_exdes.ucf
.........\..........\.......\..............\blk_mem_exdes.vhd
.........\..........\.......\..............\blk_mem_exdes.xdc
.........\..........\.......\..............\blk_mem_prod.vhd
.........\..........\.......\implement
.........\..........\.......\.........\implement.bat
.........\..........\.......\.........\implement.sh
.........\..........\.......\.........\planAhead_ise.bat
.........\..........\.......\.........\planAhead_ise.sh
.........\..........\.......\.........\planAhead_ise.tcl
.........\..........\.......\.........\xst.prj
.........\..........\.......\.........\xst.scr
.........\..........\.......\simulation
.........\..........\.......\..........\addr_gen.vhd
.........\..........\.......\..........\blk_mem_synth.vhd
.........\..........\.......\..........\blk_mem_tb.vhd
.........\..........\.......\..........\bmg_stim_gen.vhd
.........\..........\.......\..........\bmg_tb_pkg.vhd
.........\..........\.......\..........\checker.vhd
.........\..........\.......\..........\data_gen.vhd
.........\..........\.......\..........\functional
.........\..........\.......\..........\..........\simcmds.tcl
.........\..........\.......\..........\..........\simulate_isim.bat
.........\..........\.......\..........\..........\simulate_mti.bat
.........\..........\.......\..........\..........\simulate_mti.do
.........\..........\.......\..........\..........\simulate_mti.sh
.........\..........\.......\..........\..........\simulate_ncsim.sh
.........\..........\.......\..........\..........\simulate_vcs.sh
.........\..........\.......\..........\..........\ucli_commands.key
.........\..........\.......\..........\..........\vcs_session.tcl
.........\..........\.......\..........\..........\wave_mti.do
.........\..........\.......\..........\..........\wave_ncsim.sv
.........\..........\.......\..........\random.vhd
.........\..........\.......\..........\timing
.........\..........\.......\..........\......\simcmds.tcl
.........\..........\.......\..........\......\simulate_isim.bat
.........\..........\.......\..........\......\simulate_mti.bat
.........\..........\.......\..........\......\simulate_mti.do
.........\..........\.......\..........\......\simulate_mti.sh
.........\..........\.......\..........\......\simulate_ncsim.sh
.........\..........\.......\..........\......\simulate_vcs.sh
.........\..........\.......\..........\......\ucli_commands.key
.........\..........\.......\..........\......\vcs_session.tcl
.........\..........\.......\..........\......\wave_mti.do
.........\..........\.......\..........\......\wave_ncsim.sv
.........\..........\blk_mem.asy
.........\..........\blk_mem.gise
.........\..........\blk_mem.ncf
.........\..........\blk_mem.ngc
.........\..........\blk_mem.sym
.........\..........\blk_mem.v
.........\..........\blk_mem.veo
.........\..........\blk_mem.xci
.........\..........\blk_mem.xco
.........\..........\blk_mem.xise
.........\..........\blk_mem.xml
.........\..........\blk_mem_flist.txt
.........\..........\blk_mem_xmdf.tcl
.........\..........\clockwizard.asy
.........\..........\clockwizard.ucf
.........\..........\clockwizard.v
.........\..........\clockwizard.veo
.........\..........\clockwizard.xci
.........\..........\clockwizard.xco
.........\..........\clockwizard.xml
.........\..........\coregen.cgp
.........\..........\coregen.log
.........\..........\create_BUF.tcl
.........\..........\edit_blk_mem.tcl
.........\..........\edit_clockwizard.tcl
.........\..........\summary.log
.........\..........\xlnx_auto_0_xdb
.........\..........\_xmsgs
.........\..........\......\cg.