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Title: spdif_rel_1_1 Download
 Description: SPDIF Audio Interface Control VHDL Code
 Downloaders recently: [More information of uploader richman]
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spdif_interface\bench
...............\.....\CVS
...............\.....\vhdl
...............\.....\....\CVS
...............\.....\....\spdif_source.vhd
...............\.....\....\tb_gen_spdif.vhd
...............\.....\....\tb_rx_spdif.vhd
...............\.....\....\tb_spdif.vhd
...............\.....\....\wb_tb_pack.vhd
...............\CVS
...............\div
...............\doc
...............\...\copying.txt
...............\...\CVS
...............\...\spdif.pdf
...............\...\src
...............\...\...\CVS
...............\...\...\spdif.doc
...............\impl
...............\....\db
...............\....\SPDIF_RX
...............\....\........\xst
...............\....\........\...\lpm
...............\....\........\...\work
...............\....\........\...\....\sub00
...............\....\........\_ngo
...............\....\........\__projnav
...............\....\SPDIF_RX_A
...............\....\..........\db
...............\....\spdif_tx
...............\....\........\db
...............\rtl
...............\...\CVS
...............\...\vhdl
...............\...\....\CVS
...............\...\....\dpram_altera.vhd
...............\...\....\dpram_rtl.vhd
...............\...\....\gen_control_reg.vhd
...............\...\....\gen_event_reg.vhd
...............\...\....\rx_cap_reg.vhd
...............\...\....\rx_decode.vhd
...............\...\....\rx_package.vhd
...............\...\....\rx_phase_det.vhd
...............\...\....\rx_spdif.vhd
...............\...\....\rx_status_reg.vhd
...............\...\....\rx_ver_reg.vhd
...............\...\....\rx_wb_decoder.vhd
...............\...\....\tmp
...............\...\....\tx_bitbuf.vhd
...............\...\....\tx_encoder.vhd
...............\...\....\tx_package.vhd
...............\...\....\tx_spdif.vhd
...............\...\....\tx_ver_reg.vhd
...............\...\....\tx_wb_decoder.vhd
...............\sim
...............\...\tb_rx_spdif.sym
...............\...\...............\avalon_2_wb
...............\...\...............\dpmem
...............\...\...............\dpram
...............\...\...............\dp_ram
...............\...\...............\gen_control_reg
...............\...\...............\gen_dp_ram
...............\...\...............\gen_event_reg
...............\...\...............\gen_spdif
...............\...\...............\rx_cap_reg
...............\...\...............\rx_decode
...............\...\...............\rx_package
...............\...\...............\rx_phase_det
...............\...\...............\rx_spdif
...............\...\...............\rx_status_reg
...............\...\...............\rx_util
...............\...\...............\rx_ver_reg
...............\...\...............\rx_wb_decoder
...............\...\...............\spdif_source
...............\...\...............\tb_gen_spdif
...............\...\...............\tb_rx_spdif
...............\...\...............\tb_spdif
...............\...\...............\tb_wb_decoder
...............\...\...............\test
...............\...\...............\txt_util
...............\...\...............\tx_bitbuf
...............\...\...............\tx_encoder
...............\...\...............\tx_package
...............\...\...............\tx_spdif
...............\...\...............\tx_ver_reg
...............\...\...............\tx_wb_decoder
...............\...\...............\wb_tb_pack
...............\...\work
...............\...\....\control_reg
...............\...\....\control_reg_tb
...............\...\....\dpmem
...............\...\....\dpram
...............\...\....\event_reg
...............\...\....\gen_control_reg
...............\...\....\gen_event_reg
...............\...\....\rx_cap_reg
...............\...\....\rx_package
...............\...\....\rx_phase_det
...............\...\....\rx_spdif
...............\...\....\rx_status_reg
    

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