Welcome！[Sign In] ！[Sign Up]！
Front-page it | Collect it | [中国-简体中文]
FAQ Fav
Location:
Downloads SourceCode Embeded-SCM Develop VHDL-FPGA-Verilog
Title: clock Download
 Description: There are double anti-shake digital clock module, minutes and seconds can be achieved when the regulation, 24-hour clock.
 Downloaders recently: [More information of uploader 刘禹韬]
 To Search:
File list (Check if you may need any files): 
 

clock.txt

CodeBus www.codebus.net