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VHDL-FPGA-Verilog
Title:
DE2_70-1
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Category:
VHDL-FPGA-Verilog
Tags:
[WORD]
File Size:
7.81mb
Update:
2013-12-11
Downloads:
0 Times
Uploaded by:
dmi7
Description:
DE2_70 Terasic development board instructions in Chinese, but DOC version
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DE2_70开发板中文翻译.doc
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