Welcome![Sign In][Sign Up]
Location:
Downloads SourceCode Embeded-SCM Develop VHDL-FPGA-Verilog
Title: CPU Download
 Description: CPU debugging, a collection of instruction decoder, memory, etc., form a simple CPU
 Downloaders recently: [More information of uploader 痴心]
 To Search:
File list (Check if you may need any files):
 

实验6.13——实验CPU:CPU调试\被调试的CPU\cmp_state.ini
............................\...........\decoder_2_to_4.vhd
............................\...........\decoder_unit.vhd
............................\...........\exe_unit.vhd
............................\...........\exp_cpu.asm.rpt
............................\...........\exp_cpu.cdf
............................\...........\exp_cpu.done
............................\...........\exp_cpu.dpf
............................\...........\exp_cpu.eda.rpt
............................\...........\exp_cpu.fit.eqn
............................\...........\exp_cpu.fit.rpt
............................\...........\exp_cpu.fit.smsg
............................\...........\exp_cpu.fit.summary
............................\...........\exp_cpu.flow.rpt
............................\...........\exp_cpu.map.eqn
............................\...........\exp_cpu.map.rpt
............................\...........\exp_cpu.map.summary
............................\...........\exp_cpu.pin
............................\...........\exp_cpu.pof
............................\...........\exp_cpu.qpf
............................\...........\exp_cpu.qsf
............................\...........\exp_cpu.qws
............................\...........\exp_cpu.sof
............................\...........\exp_cpu.tan.rpt
............................\...........\exp_cpu.tan.summary
............................\...........\exp_cpu.vhd
............................\...........\exp_cpu_assignment_defaults.qdf
............................\...........\exp_cpu_components.vhd
............................\...........\instru_fetch.vhd
............................\...........\memory_unit.vhd
............................\...........\mux_4_to_1.vhd
............................\...........\reg.vhd
............................\...........\regfile.vhd
............................\...........\timing\primetime\exp_cpu.vho
............................\...........\......\.........\exp_cpu_pt_vhd.tcl
............................\...........\......\.........\exp_cpu_vhd.sdo
............................\...........\simulation\activehdl\exp_cpu.vo
............................\...........\..........\.........\exp_cpu_v.sdo
............................\...........\db\exp_cpu.asm.qmsg
............................\...........\..\exp_cpu.cbx.xml
............................\...........\..\exp_cpu.cmp.cdb
............................\...........\..\exp_cpu.cmp.hdb
............................\...........\..\exp_cpu.cmp.logdb
............................\...........\..\exp_cpu.cmp.rdb
............................\...........\..\exp_cpu.cmp.tdb
............................\...........\..\exp_cpu.cmp0.ddb
............................\...........\..\exp_cpu.dbp
............................\...........\..\exp_cpu.db_info
............................\...........\..\exp_cpu.eco.cdb
............................\...........\..\exp_cpu.eda.qmsg
............................\...........\..\exp_cpu.fit.qmsg
............................\...........\..\exp_cpu.hier_info
............................\...........\..\exp_cpu.hif
............................\...........\..\exp_cpu.map.cdb
............................\...........\..\exp_cpu.map.hdb
............................\...........\..\exp_cpu.map.logdb
............................\...........\..\exp_cpu.map.qmsg
............................\...........\..\exp_cpu.pre_map.cdb
............................\...........\..\exp_cpu.pre_map.hdb
............................\...........\..\exp_cpu.psp
............................\...........\..\exp_cpu.pss
............................\...........\..\exp_cpu.rtlv.hdb
............................\...........\..\exp_cpu.rtlv_sg.cdb
............................\...........\..\exp_cpu.rtlv_sg_swap.cdb
............................\...........\..\exp_cpu.sgdiff.cdb
............................\...........\..\exp_cpu.sgdiff.hdb
............................\...........\..\exp_cpu.signalprobe.cdb
............................\...........\..\exp_cpu.sld_design_entry.sci
............

CodeBus www.codebus.net