- Category:
- VHDL-FPGA-Verilog
- Tags:
-
- File Size:
- 1.13mb
- Update:
- 2014-01-14
- Downloads:
- 0 Times
- Uploaded by:
- 卢进
Description: A gray code converter FPGA-based small program, input 8-bit Gray code and conversion results.
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File list (Check if you may need any files):
Example2
........\db
........\..\exp2.asm.qmsg
........\..\exp2.asm_labs.ddb
........\..\exp2.cbx.xml
........\..\exp2.cmp.bpm
........\..\exp2.cmp.cdb
........\..\exp2.cmp.ecobp
........\..\exp2.cmp.hdb
........\..\exp2.cmp.kpt
........\..\exp2.cmp.logdb
........\..\exp2.cmp.rdb
........\..\exp2.cmp_merge.kpt
........\..\exp2.constraints.sdc
........\..\exp2.cuda_io_sim_cache.45um_ff_1200mv_0c_fast.hsd
........\..\exp2.cuda_io_sim_cache.45um_ss_1200mv_85c_slow.hsd
........\..\exp2.db_info
........\..\exp2.eco.cdb
........\..\exp2.eda.qmsg
........\..\exp2.fit.qmsg
........\..\exp2.hier_info
........\..\exp2.hif
........\..\exp2.map.bpm
........\..\exp2.map.cdb
........\..\exp2.map.ecobp
........\..\exp2.map.hdb
........\..\exp2.map.kpt
........\..\exp2.map.logdb
........\..\exp2.map.qmsg
........\..\exp2.map_bb.cdb
........\..\exp2.map_bb.hdb
........\..\exp2.map_bb.hdbx
........\..\exp2.map_bb.logdb
........\..\exp2.pre_map.cdb
........\..\exp2.pre_map.hdb
........\..\exp2.psp
........\..\exp2.rtlv.hdb
........\..\exp2.rtlv_sg.cdb
........\..\exp2.rtlv_sg_swap.cdb
........\..\exp2.sgdiff.cdb
........\..\exp2.sgdiff.hdb
........\..\exp2.sld_design_entry.sci
........\..\exp2.sld_design_entry_dsc.sci
........\..\exp2.sta.qmsg
........\..\exp2.sta.rdb
........\..\exp2.sta_cmp.8_slow_1200mv_85c.tdb
........\..\exp2.sta_col
........\..\exp2.syn_hier_info
........\..\exp2.tis_db_list.ddb
........\..\exp2.tiscmp.fast_1200mv_0c.ddb
........\..\exp2.tiscmp.fastest_slow_1200mv_0c.ddb
........\..\exp2.tiscmp.fastest_slow_1200mv_85c.ddb
........\..\exp2.tiscmp.slow_1200mv_0c.ddb
........\..\exp2.tiscmp.slow_1200mv_85c.ddb
........\..\exp2.tmw_info
........\exp2.asm.rpt
........\exp2.done
........\exp2.eda.rpt
........\exp2.fit.rpt
........\exp2.fit.smsg
........\exp2.fit.summary
........\exp2.flow.rpt
........\exp2.map.rpt
........\exp2.map.summary
........\exp2.pin
........\exp2.qpf
........\exp2.qsf
........\exp2.qws
........\exp2.sof
........\exp2.sta.rpt
........\exp2.sta.summary
........\exp2.vhd
........\incremental_db
........\..............\README
........\..............\compiled_partitions
........\..............\...................\exp2.root_partition.cmp.atm
........\..............\...................\exp2.root_partition.cmp.dfp
........\..............\...................\exp2.root_partition.cmp.hdbx
........\..............\...................\exp2.root_partition.cmp.kpt
........\..............\...................\exp2.root_partition.cmp.logdb
........\..............\...................\exp2.root_partition.cmp.rcf
........\..............\...................\exp2.root_partition.map.atm
........\..............\...................\exp2.root_partition.map.dpi
........\..............\...................\exp2.root_partition.map.hdbx
........\..............\...................\exp2.root_partition.map.kpt
........\simulation
........\..........\modelsim
........\..........\........\exp2.sft
........\..........\........\exp2.vho
........\..........\........\exp2_8_1200mv_0c_vhd_slow.sdo
........\..........\........\exp2_8_1200mv_85c_vhd_slow.sdo
........\..........\........\exp2_min_1200mv_0c_vhd_fast.sdo
........\..........\........\exp2_modelsim.xrf
........\..........\........\exp2_vhd.sdo
........\timing
........\......\primetime
........\......\.........\exp2.collections.sdc
........\......\.........\exp2.constraints.sdc
........\......\.........\exp2.pt.tcl
........\......\.........\exp2.vo