Description: simulink realize SVPWM modulation, phase-locked loop is designed to establish a three-phase and single-phase locked loop design to retain the necessary PI controller modules.
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s_PhaseLockedLoop_10b\s_10b.doc
.....................\s_siglephasePLL1_10b.mdl
.....................\s_siglephasePLL_10b.mdl
.....................\s_SVPWM_10b.mdl
.....................\s_threephasePLL_10b.mdl
s_PhaseLockedLoop_10b